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參數(shù)資料
| 型號(hào)： | AD7701TQ |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | LC2MOS 16-Bit A/D Converter |
| 中文描述： | 1-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, CDIP20 |
| 封裝： | CERDIP-20 |
| 文件頁(yè)數(shù)： | 11/16頁(yè) |
| 文件大小： | 312K |
| 代理商： | AD7701TQ |
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–11–
REV. D
AD7701
VOLT AGE RE FE RE NCE CONNE CT IONS
T he voltage applied to the V
REF
pin defines the analog input
range. T he specified reference voltage is 2.5 V, but the AD7701
will operate with reference voltages from 1 V to 3 V with little
degradation in performance.
T he reference input presents exactly the same dynamic load as
the analog input, but in the case of the reference input, source
resistance and long settling time introduce gain errors rather
than offset errors. Fortunately, most precision references have
sufficiently low output impedance and wide enough bandwidth
to settle to 10
μ
V within 62 clock cycles.
AGND
AD7701
+5V
AV
DD
V
REF
LT1019
Figure 14. Typical External Reference Connections
T he digital filter of the AD7701 removes noise from the
reference input, just as it does with noise at the analog input,
and the same limitations apply regarding lack of noise rejection
at integer multiples of the sampling frequency. If reference noise
is a problem, some voltage references offer noise reduction
schemes using an external capacitor. Alternatively, a simple RC
filter may be used, as shown in Figure 15.
+5V
AD580
AGND
AD7701
AV
DD
V
REF
R
F
13k
C
F
100pF
Figure 15. Filtered Reference Input
T he same considerations apply to this filter as to a filter at the
analog input. In this case:
[
R
F
(
C
F
+
10
pF
)]
=
62
f
CLKIN
×
ln
100
mV
×
C
IN
(
C
IN
+
C
F
)
V
FSE
where:
f
CLKIN
is
the master clock frequency
and
V
FSE
is
the maximum desired error in volts.
GROUNDING AND SUPPLY DE COUPLING
AGND is the ground reference voltage for the AD7701, and is
completely independent of DGND. Any noise riding on the
AGND input with respect to the system analog ground will
cause conversion errors. AGND should therefore be used as the
system ground and also as the ground for the analog input and
the reference voltage.
T he analog and digital power supplies to the AD7701 are
independent and separately pinned out, to minimize coupling
between analog and digital sections of the device. T he digital
filter will provide rejections of broadband noise on the power
supplies, except at integer multiples of the sampling frequency.
T herefore, the two analog supplies should be decoupled to
AGND using 100 nF ceramic capacitors to provide power
supply noise rejections at these frequencies. T he two digital
supplies should similarly be decoupled to DGND.
ACCURACY AND AUT OCALIBRAT ION
Sigma-delta ADCs, like VFCs and other integrating ADCs, do
not contain any source of nonmonotonicity and inherently offer
no-missing-codes performance. T he AD7701 achieves excellent
linearity (
±
0.0007%) by the use of high quality, on-chip silicon
dioxide capacitors, which have a very low capacitance/voltage
coefficient.
T he AD7701 offers two self-calibration modes using the on-chip
calibration microcontroller and SRAM. T able III is a truth table
for the calibration control inputs SC1 and SC2.
In the self-calibration mode, zero-scale is calibrated against the
AGND pin and full scale is calibrated against the V
REF
pin, to
remove internal errors.
Note that in the bipolar mode the AD7701 calibrates positive
full scale and midscale (bipolar zero).
In the system-calibration mode, the AD7701 calibrates its zero
and full scale to voltages present on the analog input pin in two
sequential steps. T his allows system offsets and/or gain errors to
be nulled out.
SYSTEM
REF HI
A
IN
SYSTEM
REF LO
ANALOG
MUX
A0
A1
SIGNAL
CONDITIONING
AD7701
MICRO
COMPUTER
SCLK
SDATA
CAL
SC1
SC2
Figure 16. Typical Connections for System Calibration
A typical system calibration scheme is shown in Figure 16. In
normal operation the analog signal is fed to the AD7701 via an
analog multiplexer. When the system is to be calibrated, A
IN
is
first switched to the system REF LO via the multiplexer and
CAL is strobed high, with SC1 and SC2 both high. AIN is then
switched to the system REF HI and CAL is strobed, with SC1
low and SC2 high. In this way, the effect of all error sources
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