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參數資料
| 型號： | AD7871KN |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | 10-Bit, 20 MSPS ADC SE/Diff Inputs with Int References and 9.5 bit ENOB 28-SOIC -40 to 85 |
| 中文描述： | 1-CH 14-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL/PARALLEL ACCESS, PDIP28 |
| 封裝： | PLASTIC, DIP-28 |
| 文件頁數： | 6/16頁 |
| 文件大小： | 344K |
| 代理商： | AD7871KN |
AD7871/AD7872
–6–
REV. D
CONVE RT E R DE T AILS
T he AD7871/AD7872 is a complete 14-bit A/D converter, re-
quiring no external components apart from power supply
decoupling capacitors. It is comprised of a 14-bit successive ap-
proximation ADC based on a fast settling voltage-output DAC,
a high speed comparator and CMOS SAR, a track/hold ampli-
fier, a 3 V buried Zener reference, a clock oscillator and control
logic.
INT E RNAL RE FE RE NCE
T he AD7871/AD7872 has an on-chip temperature compensated
buried Zener reference that is factory trimmed to 3 V
±
10 mV.
Internally it provides both the DAC reference and the dc bias
required for bipolar operation. Reference noise is minimized by
connecting a capacitor between C
REF
and AGND. For specified
operation this capacitor should be 10 nF. T he reference output
is available (REF OUT ) and capable of providing up to 500
μ
A to
an external load.
T he maximum recommended capacitance on REF OUT for
normal operation is 50 pF. If the reference is required for use
external to the AD7871/AD7872, it should be decoupled with a
200
resistor in series with a parallel combination of a 10
μ
F
tantalum capacitor and a 0.1
μ
F ceramic capacitor. T hese
decoupling components are required to remove voltage spikes
caused by the AD7871/AD7872’s internal operation.
Figure 3. Reference Circuit
T RACK -AND-HOLD AMPLIFIE R
T he track-and-hold amplifier on the analog input of the
AD7871/AD7872 allows the ADC to accurately convert an in-
put sine wave of 6 V peak-peak amplitude to 14-bit accuracy.
T he input bandwidth of the track/hold amplifier is much greater
than the Nyquist rate of the ADC even when the ADC is oper-
ated at its maximum throughput rate. T he 0.1 dB cutoff fre-
quency occurs typically at 500 kHz. T he track/hold amplifier
acquires an input signal to 14-bit accuracy in less than 2
μ
s. T he
overall throughput rate is determined by the conversion time
plus the track/hold amplifier acquisition time. For a 2 MHz
input clock the throughput time is 12
μ
s maximum.
Figure 4. Analog Input
T he operation of the track/hold amplifier is essentially transpar-
ent to the user. T he track/hold amplifier goes from its tracking
mode to its hold mode at the start of conversion. If the
CONVST
input is used to start conversion, then the track to
hold transition occurs on the rising edge of
CONVST
. If
CS
on
the AD7871 starts conversion, this transition occurs on the fall-
ing edge of
CS
.
ANALOG INPUT
Figure 4 shows the AD7871/AD7872 analog input. T he analog
input range is
±
3 V into an input resistance of typically 15 k
.
T he designed code transitions occur midway between successive
integer LSB values (i.e., 1/2 LSB, 3/2 LSBs, 5/2 LSBs . . . FS
–3/2 LSBs). T he output code is twos-complement binary with
1 LSB = FS/16384 = 6 V/16384 = 366
μ
V. T he ideal input/out-
put transfer function is shown in Figure 5.
Figure 5. Bipolar Input/Output Transfer Function
BIPOLAR OFFSE T AND FULL-SCALE ADJUST ME NT
When the AD7871/AD7872’s offset and full-scale errors need to
be adjusted, offset error must be adjusted first. T his is achieved
by trimming the offset of the op amp driving the analog input of
the AD7871/AD7872 while the input voltage is 1/2 LSB below
AGND. T he trim procedure is as follows: apply a voltage of
–0.183 mV (–1/2 LSB) at V
1
in Figure 6 and adjust the op amp
offset voltage until the ADC output code flickers between 11
1111 1111 1111 and 00 0000 0000 0000.
Figure 6. Bipolar Adjust Circuit
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