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參數資料
| 型號： | AD7871KP |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | LC2MOS Complete 14-Bit, Sampling ADCs |
| 中文描述： | 1-CH 14-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL/PARALLEL ACCESS, PQCC28 |
| 封裝： | PLASTIC, LCC-28 |
| 文件頁數： | 13/16頁 |
| 文件大小： | 344K |
| 代理商： | AD7871KP |
AD7871/AD7872
–13–
REV. D
LAY OUT HINT S
Ensure that the layout for the printed circuit board has the digi-
tal and analog signal lines separated as much as possible. T ake
care not to run a digital track alongside an analog signal track.
Guard (screen) the analog input with AGND.
Establish a single point analog ground (star ground) separate
from the logic system ground at the AD7871/AD7872 AGND
pin or as close as possible to the AD7871/AD7872. Connect all
other grounds and the AD7871/AD7872 DGND to this single
analog ground point. Do not connect any other digital grounds
to this analog ground point.
Low impedance analog and digital power supply common re-
turns are essential to low noise operation of the ADC, so make
the foil width for these tracks as wide as possible. T he use of
ground planes minimizes impedance paths and also guards the
analog circuitry from digital noise. T he circuit layout of Figures
26 and 27 have both analog and digital ground planes that are
kept separated and joined together only at the AD7871/AD7872
AGND pin.
NOISE
K eep the input signal leads to V
IN
and signal return leads from
AGND as short as possible to minimize input noise coupling. In
applications where this is not possible, use a shielded cable be-
tween the source and the ADC. Reduce the ground circuit im-
pedance as much as possible since any potential difference in
grounds between the signal source and the ADC appears as an
error voltage in series with the input signal.
DAT A ACQUISIT ION BOARD
Figure 24 shows the AD7871/AD7872 in a data acquisition cir-
cuit. T he corresponding printed circuit board (PCB) layout has
three interface ports: one serial and two parallel. Note that the
AD7871/AD7872 serial lines are buffered by a 74HC244. T his
allows long lines with large capacitive loads to be driven. One of
the parallel ports is directly compatible with the ADSP-2100
evaluation board expansion connector.
T he only additional component required for a full data acquisi-
tion system is an anti-aliasing filter. T here is a component grid
provided near the analog input on the PCB, which may be used
for such a filter or any other input conditioning circuitry. T o fa-
cilitate this option, there is a shorting plug (labelled LK 1 on the
PCB) on the analog input track. If this shorting plug is used, the
analog input connects to the buffer amplifier driving the AD7871/
AD7872; if this shorting plug is omitted, a wire link can be used to
connect the analog input to the PCB component grid.
INT E RFACE CONNE CT IONS
T here are two parallel connectors labeled SK T 4 and SK T 6,
and one serial connector labeled SK T 5. A shorting plug option
(LK 3 in Figure 24) configures the ADC for the appropriate
interface.
SK T 6 is a 96-contact (3-row) Eurocard connector that is directly
compatible with the ADSP-2100 Evaluation Board Prototype
Expansion Connector. T he expansion connector on the
ADSP-2100 has eight decoded chip enable outputs labeled
ECE1 to ECE8. ECE6 is used to drive the AD7871
CS
input
on the board. T o avoid selecting the onboard RAM sockets at
the same time, LK 6 on the ADSP-2100 board must be removed.
In addition, the ADSP-2100 expansion connector has four in-
terrupts labelled EIRQ0 to EIRQ3. T he AD7871
BUSY
/
INT
output connects to EIRQ0. T here is a single wait state generator
connected to EDMACK to allow the AD7871 to interface to the
faster versions of the ADSP-2100.
SK T 4 is a 26-way (2-row) IDC connector. T his contains the
same signal contacts as SK T 6 except for EDMACK , which is
connected to SK T 6 only. It also contains decoded R/
W
and
STRB
inputs necessary for T MS32020 interfacing.
SK T 5 is a 5-way D-type connector meant for serial interfacing
only. An inverted DB11/SCLK output is also provided on this
connector for systems that accept data on a rising clock edge.
SK T 1, SK T 2 and SK T 3 are three BNC connectors providing
connections for the analog input, the
CONVST
input and an
external clock.
Figure 22. SKT4 Pinout
Figure 23. SKT5 Pinout
POWE R SUPPLY CONNE CT IONS
T he PCB requires two analog power supplies and one 5 V logic
supply. T he analog supplies are labelled V+ and V–, and the
range for both supplies is 12 V to 15 V. Connection to the 5 V
digital supply is made through any of the connectors SK T 4 to
SK T 6. T he
±
5 V supply required by the AD7871 and AD7872
is generated from voltage regulators on the V+ and V– power
supplies input (IC6 and IC7 in Figure 24).
SHORT ING PLUG OPT IONS
T here are seven shorting plug options which must be set before
using the board. T hese are outlined below:
LK 1
Connects the analog input to a buffer amplifier. T he
analog input may also be connected to a component
grid for signal conditioning.
LK 2
Selects either the AD7871/AD7872 internal clock or
an external clock source.
LK 3
Configures the AD7871 14/
8
/CLK input for the
appropriate serial or parallel interface.
LK 4
Connects the AD7871
RD
input directly to the two par-
allel connectors or to a decoded
STRB
and R/
W
input.
LK 5
Connects the pull-up resistor R3 to
SSTRB
.
LK 6
Connects the pull-up resistor R4 to SCLK .
LK 7
Connects the pull-up resistor R5 to SDAT A.
Note that LK 5 to LK 7 should be removed for parallel interfacing.
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