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參數(shù)資料
| 型號(hào)： | AD7875KN |
| 廠商： | ANALOG DEVICES INC |
| 元件分類(lèi)： | ADC |
| 英文描述： | LC2MOS Complete, 12-Bit, 100 kHz, Sampling ADCs |
| 中文描述： | 1-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL/PARALLEL ACCESS, PDIP24 |
| 封裝： | 0.300 INCH, PLASTIC, MS-001, DIP-24 |
| 文件頁(yè)數(shù)： | 2/20頁(yè) |
| 文件大小： | 331K |
| 代理商： | AD7875KN |
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AD7870
K, B
l
Parameter
J, A
l
L, C
l
S
l
T
l
Units
T est Conditions/Comments
DYNAMIC PERFORMANCE
2
Signal to Noise Ratio
3
(SNR)
@ +25
°
C
T
MIN
to T
MAX
T otal Harmonic Distortion (T HD)
70
70
–80
70
70
–80
72
71
–80
69
69
–78
69
69
–78
dB min
dB min
dB max
V
IN
= 10 kHz Sine Wave, f
SAMPLE
= 100 kHz
T ypically 71.5 dB for 0 < V
IN
< 50 kHz
V
IN
= 10 kHz Sine Wave, f
SAMPLE
= 100 kHz
T ypically –86 dB for 0 < V
IN
< 50 kHz
V
IN
= 10 kHz, f
SAMPLE
= 100 kHz
T ypically –86 dB for 0 < V
IN
< 50 kHz
Peak Harmonic or Spurious Noise
–80
–80
–80
–78
–78
dB max
Intermodulation Distortion (IMD)
Second Order T erms
T hird Order T erms
T rack/Hold Acquisition T ime
–80
–80
2
–80
–80
2
–80
–80
2
–78
–78
2
–78
–78
2
dB max
dB max
μ
s max
fa = 9 kHz, fb = 9.5 kHz, f
SAMPLE
= 50 kHz
fa = 9 kHz, fb = 9.5 kHz, f
SAMPLE
= 50 kHz
DC ACCURACY
Resolution
Minimum Resolution for which
No Missing Codes are Guaranteed
Integral Nonlinearity
Integral Nonlinearity
Differential Nonlinearity
Bipolar Zero Error
Positive Full-Scale Error
4
Negative Full-Scale Error
4
12
12
12
12
12
Bits
12
±
1/2
12
±
1/2
±
1
±
1
±
5
±
5
±
5
12
±
1/4
±
1/2
±
1
±
5
±
5
±
5
12
±
1/2
12
±
1/2
±
1
±
1
±
5
±
5
±
5
Bits
LSB typ
LSB max
LSB max
LSB max
LSB max
LSB max
±
5
±
5
±
5
±
5
±
5
±
5
ANALOG INPUT
Input Voltage Range
Input Current
±
3
±
500
±
3
±
500
±
3
±
500
±
500
±
3
±
3
±
500
Volts
μ
A max
REFERENCE OUT PUT
REF OUT @ +25
°
C
2.99
3.01
±
60
±
1
2.99
3.01
±
60
±
1
2.99
3.01
±
35
±
1
2.99
3.01
±
60
±
1
2.99
3.01
±
35
±
1
V min
V max
ppm/
°
C max
mV max
REF OUT T empco
Reference Load Sensitivity (
REF OUT /
I)
Reference Load Current Change (0–500
μ
A)
Reference Load Should Not Be Changed
During Conversion.
LOGIC INPUT S
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current, I
IN
Input Current (12/
8
/CLK Input Only)
Input Capacitance, C
IN5
2.4
0.8
±
10
±
10
10
2.4
0.8
±
10
±
10
10
2.4
0.8
±
10
±
10
10
2.4
0.8
±
10
±
10
10
2.4
0.8
±
10
±
10
10
V min
V max
μ
A max
μ
A max
pF max
V
DD
= 5 V
±
5%
V
DD
= 5 V
±
5%
V
IN
= 0 V to V
DD
V
IN
= V
SS
to V
DD
LOGIC OUT PUT S
Output High Voltage, V
OH
Output Low Voltage, V
OL
DB11–DB0
Floating-State Leakage Current
Floating-State Output Capacitance
5
4.0
0.4
4.0
0.4
4.0
0.4
4.0
0.4
4.0
0.4
V min
V max
I
SOURCE
= 40
μ
A
I
SINK
= 1.6 mA
±
10
15
±
10
15
±
10
15
±
10
15
±
10
15
μ
A max
pF max
CONVERSION T IME
External Clock (f
CLK
= 2.5 MHz)
Internal Clock
8
7/9
8
7/9
8
7/9
8
7/9
8
7/9
μ
s max
μ
s min/
μ
s max
POWER REQUIREMENT S
V
DD
V
SS
I
DD
I
SS
Power Dissipation
+5
–5
13
6
95
+5
–5
13
6
95
+5
–5
13
6
95
+5
–5
13
6
95
+5
–5
13
6
95
V nom
V nom
mA max
mA max
mW max
±
5% for Specified Performance
±
5% for Specified Performance
T ypically 8 mA
T ypically 4 mA
T ypically 60 mW
NOT ES
1
T emperature ranges are as follows: J, K , L Versions; 0
°
C to +70
°
C: A, B, C Versions; –25
°
C to +85
°
C: S, T Versions; –55
°
C to +125
°
C.
2
V
(pk-pk) =
±
3 V.
3
SNR calculation includes distortion and noise components.
4
Measured with respect to internal reference and includes bipolar offset error.
5
Sample tested @ +25
°
C to ensure compliance.
Specifications subject to change without notice.
AD7870/AD7875/AD7876–SPECIFICATIONS
A6ND = DGND = 0 V, f
CLK
= 2.5 MHz external, unless otherwse stated. All Specifications T
mn
to T
max
unless otherwse noted.)
DD
= +5 V
6
5%, V
SS
= –5 V
6
5%,
REV. B
–2–
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