- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄373922 > AD7875TQ (ANALOG DEVICES INC) LC2MOS Complete, 12-Bit, 100 kHz, Sampling ADCs PDF資料下載
參數(shù)資料
| 型號： | AD7875TQ |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | LC2MOS Complete, 12-Bit, 100 kHz, Sampling ADCs |
| 中文描述： | 1-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL/PARALLEL ACCESS, CDIP24 |
| 封裝： | 0.300 INCH, HERMETIC SEALED, CERAMIC, DIP-24 |
| 文件頁數(shù)： | 12/20頁 |
| 文件大小： | 331K |
| 代理商： | AD7875TQ |
REV. B
AD7870/AD7875/AD7876
–12–
Figure 15. IMD Plot
AC Linearity Plot
When a sine wave of specified frequency is applied to the V
IN
input of the AD7870/AD7875 and several million samples are
taken, a histogram showing the frequency of occurrence of each
of the 4096 ADC codes can be generated. From this histogram
data it is possible to generate an ac integral linearity plot as
shown in Figure 16. T his shows very good integral linearity per-
formance from the AD7870/AD7875 at an input frequency of
25 kHz. T he absence of large spikes in the plot shows good dif-
ferential linearity. Simplified versions of the formulae used are
outlined below.
INL
(
i
) =
V
(
i
) ±
V
(
o
)
V
(
fs
) ±
V
(
o
)
4096
–
i
where INL(i) is the integral linearity at code i. V(fs) and V(o)
are the estimated full-scale and offset transitions and V(i) is the
estimated transition for the i
th
code.
V(i) the estimated code transition point is derived as follows:
[
V
(
i
)
= –A Cos
π
cum
(
i
)
N
]
where A is the peak signal amplitude,
N is the number of histogram samples
and cum(i) =
Σ
i
n=0
V(n)
occurrences
Figure 16. AC INL Plot
Figure 14 shows a typical plot of effective number of bits versus
frequency for an AD7870K N/AD7875K N with a sampling fre-
quency of 100 kHz. T he effective number of bits typically falls
between 11.7 and 11.85 corresponding to SNR figures of 72.2
and 73.1 dB.
Figure 14. Effective Number of Bits vs. Frequency
T otal Harmonic Distortion (T HD)
T HD is the ratio of the rms sum of harmonics to the rms value
of the fundamental. For the AD7870/AD7875, T HD is defined
as
THD =
20
log
V
22
+
V
32
+
V
42
+
V
52
+
V
62
V
1
where V
1
is the rms amplitude of the fundamental and V
2
, V
3
,
V
4
, V
5
and V
6
are the rms amplitudes of the second through the
sixth harmonic. T he T HD is also derived from the FFT plot of
the ADC output spectrum.
Intermodulation Distortion
With inputs consisting of sine waves at two frequencies, fa and
fb, any active device with nonlinearities will create distortion
products at sum and difference frequencies of mfa
±
nfb where
m, n = 0, 1, 2, 3, etc. Intermodulation terms are those for which
neither m nor n are equal to zero. For example, the second or-
der terms include (fa + fb) and (fa – fb), while the third order
terms include (2fa + fb), (2fa – fb), (fa + 2fb) and (fa – 2fb).
Using the CCIF standard, where two input frequencies near the
top end of the input bandwidth are used, the second and third
order terms are of different significance. T he second order terms
are usually distanced in frequency from the original sine waves
while the third order terms are usually at a frequency close to
the input frequencies. As a result, the second and third order
terms are specified separately. T he calculation of the intermodu-
lation distortion is as per the T HD specification where it is the
ratio of the rms sum of the individual distortion products to the
rms amplitude of the fundamental expressed in dBs. In this
case, the input consists of two, equal amplitude, low distortion
sine waves. Figure 15 shows a typical IMD plot for the AD7870/
AD7875.
Peak Harmonic or Spurious Noise
Peak harmonic or spurious noise is defined as the ratio of the
rms value of the next largest component in the ADC output
spectrum (up to FS/2 and excluding dc) to the rms value of the
fundamental. Normally, the value of this specification will be
determined by the largest harmonic in the spectrum, but for
parts where the harmonics are buried in the noise floor the peak
will be a noise peak.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD7876BN | 16-Bit, Pseudo Bipolar, Fully Diff Input, 250kSPS Serial Out, 2.7V to 5.5V Micro Power Sampling ADC 8-MSOP -40 to 85 |
| AD7876BQ | 16-Bit, Pseudo Bipolar, Fully Diff Input, 250kSPS Serial Out, 2.7V to 5.5V Micro Power Sampling ADC 8-MSOP -40 to 85 |
| AD7876BR | 16-Bit, Pseudo Bipolar, Fully Diff Input, 250kSPS Serial Out, 2.7V to 5.5V Micro Power Sampling ADC 8-MSOP -40 to 85 |
| AD7870 | Complete, 12-Bit, 100 kHz, Sampling ADCs(LC2MOS 12位100kHz采樣A/D轉(zhuǎn)換器) |
| AD7875 | Complete, 12-Bit, 100 kHz, Sampling ADCs(LC2MOS 12位100kHz采樣A/D轉(zhuǎn)換器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD7875TQ/883B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog-to-Digital Converter， 12-Bit |
| AD7876 | 制造商:AD 制造商全稱:Analog Devices 功能描述:LC2MOS Complete, 12-Bit, 100 kHz, Sampling ADCs |
| AD7876BN | 功能描述:IC ADC 12BIT SAMPLING 10V 24-DIP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應(yīng)商設(shè)備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個單端，雙極 |
| AD7876BNZ | 功能描述:IC ADC 12BIT SAMPLING 10V 24DIP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 其它有關(guān)文件:TSA1204 View All Specifications 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):12 采樣率（每秒）:20M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:155mW 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應(yīng)商設(shè)備封裝:48-TQFP（7x7） 包裝:Digi-Reel® 輸入數(shù)目和類型:4 個單端，單極；2 個差分，單極 產(chǎn)品目錄頁面:1156 (CN2011-ZH PDF) 其它名稱:497-5435-6 |
| AD7876BNZ1 | 制造商:AD 制造商全稱:Analog Devices 功能描述:LC2MOS Complete, 12-Bit, 100 kHz, Sampling ADCs |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。