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參數資料
| 型號： | AD8019ARU |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | DSL Line Driver with Power-Down |
| 中文描述： | DUAL LINE DRIVER, PDSO14 |
| 封裝： | TSSOP-14 |
| 文件頁數： | 10/20頁 |
| 文件大小： | 782K |
| 代理商： | AD8019ARU |
REV. 0
AD8019
–10–
11dBm
1.2
TURNS RATIO
–
N
1.0
M
–
1.1
–
80
–
70
–
60
–
50
–
40
–
30
–
20
10dBm
–
10
0
1.3
1.4
1.5
1.6
1.7
12dBm
13dBm
TPC 30. MTPR vs. Turns Ratio; V
S
=
±
6 V, R
L
= 100
Line
18dBm
17dBm
1.2
TURNS RATIO
–
N
1.0
M
–
1.1
–
80
–
70
–
60
–
50
–
40
–
30
1.3
1.4
1.5
1.6
1.7
13dBm
16dBm
TPC 31. MTPR vs. Turns Ratio; V
S
=
±
12 V, R
L
= 100
Line
1.2
TURNS RATIO
–
N
1.0
S
–
1.1
–
90
–
80
–
70
–
60
–
50
–
40
–
30
1.3
1.4
1.5
1.6
1.7
11dBm
12dBm
13dBm
10dBm
TPC 32. SFDR vs. Turns Ratio; V
S
=
±
6 V, R
L
= 100
Line
1.2
TURNS RATIO
–
N
1.0
S
–
1.1
–
90
–
85
–
80
–
75
–
70
–
65
1.3
1.4
1.5
1.6
1.7
–
60
–
55
–
50
17dBm
16dBm
13dBm
18dBm
TPC 33. SFDR vs. Turns Ratio; V
S
=
±
12 V, R
L
= 100
Line
相關PDF資料 |
PDF描述 |
|---|---|
| AD8019AR-EVAL | DSL Line Driver with Power-Down |
| AD8019AR-REEL | DSL Line Driver with Power-Down |
| AD802-155BR | Clock Recovery and Data Retiming Phase-Locked Loop |
| AD802-155KR | Clock Recovery and Data Retiming Phase-Locked Loop |
| AD8021 | Low Noise, High Speed Amplifier for 16-Bit Systems |
相關代理商/技術參數 |
參數描述 |
|---|---|
| AD8019ARU-EVAL | 制造商:Analog Devices 功能描述:Evaluation Board For DSL Line Driver With Power-Down |
| AD8019ARU-REEL | 制造商:Analog Devices 功能描述:ADSL Driver Dual 180MHz 14-Pin TSSOP T/R 制造商:Analog Devices 功能描述:ADSL DRVR DUAL 180MHZ 14TSSOP - Tape and Reel 制造商:Rochester Electronics LLC 功能描述:TSSOP DSL LINE DRIVER WITH POWER DOWN - Tape and Reel |
| AD8019ARUZ | 制造商:Analog Devices 功能描述:ADSL Driver Dual 180MHz 14-Pin TSSOP |
| AD8019ARZ | 制造商:Analog Devices 功能描述:ADSL Driver Dual 180MHz 8-Pin SOIC N |
| AD802 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:AD800/AD802: Clock Recovery and Data Retiming Phase-Locked Loop Data Sheet (Rev. B. 12/93) |
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