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參數資料
| 型號： | AGLE600V2-FGG484 |
| 廠商： | Microsemi SoC |
| 文件頁數： | 156/166頁 |
| 文件大小： | 0K |
| 描述： | IC FPGA IGLOOE 1.2-1.5V 484FPBG |
| 標準包裝： | 60 |
| 系列： | IGLOOe |
| 邏輯元件/單元數： | 13824 |
| RAM 位總計： | 110592 |
| 輸入/輸出數： | 270 |
| 門數： | 600000 |
| 電源電壓： | 1.14 V ~ 1.575 V |
| 安裝類型： | 表面貼裝 |
| 工作溫度： | 0°C ~ 70°C |
| 封裝/外殼： | 484-BGA |
| 供應商設備封裝： | 484-FPBGA（23x23） |
| 其它名稱： | 1100-1119 |
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IGLOOe Low Power Flash FPGAs
Revision 13
1-3
Reduced Cost of Ownership
Advantages to the designer extend beyond low unit cost, performance, and ease of use. Unlike SRAM-
based FPGAs, Flash-based IGLOOe devices allow all functionality to be Instant On; no external boot
PROM is required. On-board security mechanisms prevent access to all the programming information
and enable secure remote updates of the FPGA logic. Designers can perform secure remote in-system
reprogramming to support future design iterations and field upgrades with confidence that valuable
intellectual property cannot be compromised or copied. Secure ISP can be performed using the industry-
standard AES algorithm. The IGLOOe family device architecture mitigates the need for ASIC migration at
higher user volumes. This makes the IGLOOe family a cost-effective ASIC replacement solution,
especially for applications in the consumer, networking/communications, computing, and avionics
markets.
Firm-Error Immunity
Firm errors occur most commonly when high-energy neutrons, generated in the upper atmosphere, strike
a configuration cell of an SRAM FPGA. The energy of the collision can change the state of the
configuration cell and thus change the logic, routing, or I/O behavior in an unpredictable way. These
errors are impossible to prevent in SRAM FPGAs. The consequence of this type of error can be a
complete system failure. Firm errors do not exist in the configuration memory of IGLOOe flash-based
FPGAs. Once it is programmed, the flash cell configuration element of IGLOOe FPGAs cannot be altered
by high-energy neutrons and is therefore immune to them. Recoverable (or soft) errors occur in the user
data SRAM of all FPGA devices. These can easily be mitigated by using error detection and correction
(EDAC) circuitry built into the FPGA fabric.
Advanced Flash Technology
The IGLOOe family offers many benefits, including nonvolatility and reprogrammability, through an
advanced flash-based, 130-nm LVCMOS process with seven layers of metal. Standard CMOS design
techniques are used to implement logic and control functions. The combination of fine granularity,
enhanced flexible routing resources, and abundant flash switches allows for very high logic utilization
without compromising device routability or performance. Logic functions within the device are
interconnected through a four-level routing hierarchy.
IGLOOe family FPGAs utilize design and process techniques to minimize power consumption in all
modes of operation.
Advanced Architecture
The proprietary IGLOOe architecture provides granularity comparable to standard-cell ASICs. The
IGLOOe device consists of five distinct and programmable architectural features (Figure 1-1 on page 4):
Flash*Freeze technology
FPGA VersaTiles
Dedicated FlashROM
Dedicated SRAM/FIFO memory
Extensive CCCs and PLLs
Pro I/O structure
The FPGA core consists of a sea of VersaTiles. Each VersaTile can be configured as a three-input logic
function, a D-flip-flop (with or without enable), or a latch by programming the appropriate flash switch
interconnections. The versatility of the IGLOOe core tile as either a three-input lookup table (LUT)
equivalent or a D-flip-flop/latch with enable allows for efficient use of the FPGA fabric. The VersaTile
capability is unique to the Microsemi ProASIC family of third-generation-architecture flash FPGAs.
VersaTiles are connected with any of the four levels of routing hierarchy. Flash switches are distributed
throughout the device to provide nonvolatile, reconfigurable interconnect programming. Maximum core
utilization is possible for virtually any design.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| AGLE600V2-FGG484I | 功能描述:IC FPGA 1KB FLASH 600K 484-FBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現場可編程門陣列） 系列:IGLOOe 產品培訓模塊:Three Reasons to Use FPGA's in Industrial Designs Cyclone IV FPGA Family Overview 特色產品:Cyclone? IV FPGAs 標準包裝:60 系列:CYCLONE® IV GX LAB/CLB數:9360 邏輯元件/單元數:149760 RAM 位總計:6635520 輸入/輸出數:270 門數:- 電源電壓:1.16 V ~ 1.24 V 安裝類型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:484-BGA 供應商設備封裝:484-FBGA（23x23） |
| AGLE600V2-FGG896 | 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:IGLOOe Low-Power Flash FPGAs with Flash Freeze Technology |
| AGLE600V2-FGG896ES | 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:IGLOOe Low-Power Flash FPGAs with Flash Freeze Technology |
| AGLE600V2-FGG896I | 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:IGLOOe Low-Power Flash FPGAs with Flash Freeze Technology |
| AGLE600V2-FGG896PP | 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:IGLOOe Low-Power Flash FPGAs with Flash Freeze Technology |
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