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參數資料
| 型號： | DEM-ADS78DIP |
| 英文描述： | DEM-ADS78DIP - EVALUATION FIXTURE |
| 中文描述： | DEM的ADS78DIP -評價夾具 |
| 文件頁數： | 7/12頁 |
| 文件大小： | 206K |
| 代理商： | DEM-ADS78DIP |
7
DEM-ACF2101BP
FIGURE 8. Timing Sequence of the Rows of SW1 on the DEM-ACF2101BP Evaluation Fixture.
FIGURE 9. Examples of Switch Settings and Procedure for Setting the Timing of the Switches for the DEM-ACF2101BP
Evaluation Fixture.
Cycle Time
3.3
(1)
T
PULSE
Trigger In
Row 2
Row 3
(2)
Row 4
(2)
Row 5
(2)
Row 6
(2)
Row 7
(2)
Row 8
(2)
Row 9
(2)
T
PULSE
(1)
NOTE: (1) T
Row 9, Row 9 will always be zero. If Column A is set to Row 8, Row 8 and Row 9 will always be zero, etc.)
= 0.55 (R
+ RV
) C
. (2) True for Column A set to row 0 (if Column A is set to
Column
Row
Hold Time
Trigger
Cycle Time
Select Time
Reset Time
Pulse Time
(T
PULSE
)
G
3
F
6
E
3
D
3
C
5
B
5
Column
Hold Time
Trigger
Cycle Time
Select Time
Reset Time
Pulse Time
(T
PULSE
)
G
3
F
8
E
3
D
4
C
6
B
7
Procedure for Setting Timing of Switches
1. Draw desired switching diagram for
your application.
2. Select cycle time for your application.
It must be greater than 50μs and less
than 500ms.
3. Calculate the trigger frequency,
f
TRIGGER
= 1/cycle time.
4. Apply power (±15, +5, ground) and the trigger
signal to the DEM-ACF2101BP board.
5. Select desired pulse width. It must be greater
than 6ns and less th an 36μs.
6. Adjust desired pulse width by setting SW1,
Row 2 to Column D and Row 2 to Column E.
Look at Select signal on a scope and adjust
signal width with RV
1
.
7. Set the Rows of SW1 to match desired columns
to match switching diagram.
8. NOTE: The rise edge of the Reset switch should
not coincide with the falling edge of the Hold switch.
If it does, there is a chance that data wll be lost.
Row
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