免费欧美网站_国产精品成熟老女人_一区二区国产精品视频_欧美野外猛男的大粗鳮_97神马电影_色就是色欧美_免费一区二区三区在线观看_国产精品熟女一区二区不卡_国产又粗又黄又猛_真实乱视频国产免费观看

您好，
買賣IC網(wǎng)歡迎您。
請登錄
免費注冊

您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄22018 > EP1K100QC208-3N (Altera)IC ACEX 1K FPGA 100K 208-PQFP PDF資料下載

參數(shù)資料

型號：	EP1K100QC208-3N
廠商：	Altera
文件頁數(shù)：	37/86頁
文件大小：	0K
描述：	IC ACEX 1K FPGA 100K 208-PQFP
產(chǎn)品培訓(xùn)模塊：	Three Reasons to Use FPGA's in Industrial Designs
標(biāo)準(zhǔn)包裝：	144
系列：	ACEX-1K®
LAB/CLB數(shù)：	624
邏輯元件/單元數(shù)：	4992
RAM 位總計：	49152
輸入/輸出數(shù)：	147
門數(shù)：	257000
電源電壓：	2.375 V ~ 2.625 V
安裝類型：	表面貼裝
工作溫度：	0°C ~ 85°C
封裝/外殼：	208-BFQFP
供應(yīng)商設(shè)備封裝：	208-PQFP（28x28）
其它名稱：	544-1825 EP1K100QC208-3N-ND

Altera Corporation

ACEX 1K Programmable Logic Device Family Data Sheet

IEEE Std.

1149.1 (JTAG)

Boundary-Scan

Support

All ACEX 1K devices provide JTAG BST circuitry that complies with the

IEEE Std. 1149.1-1990 specification. ACEX 1K devices can also be

configured using the JTAG pins through the ByteBlasterMV or BitBlaster

download cable, or via hardware that uses the JamTM Standard Test and

Programming Language (STAPL), JEDEC standard JESD-71. JTAG

boundary-scan testing can be performed before or after configuration, but

not during configuration. ACEX 1K devices support the JTAG

instructions shown in Table 14.

The instruction register length of ACEX 1K devices is 10 bits. The

USERCODE register length in ACEX 1K devices is 32 bits; 7 bits are

determined by the user, and 25 bits are pre-determined. Tables 15 and 16

show the boundary-scan register length and device IDCODE information

for ACEX 1K devices.

Table 14. ACEX 1K JTAG Instructions

JTAG Instruction

Description

SAMPLE/PRELOAD

Allows a snapshot of signals at the device pins to be captured and examined during

normal device operation and permits an initial data pattern to be output at the device

pins.

EXTEST

Allows the external circuitry and board-level interconnections to be tested by forcing a

test pattern at the output pins and capturing test results at the input pins.

BYPASS

Places the 1-bit bypass register between the TDI and TDO pins, allowing the BST data

to pass synchronously through a selected device to adjacent devices during normal

operation.

USERCODE

Selects the user electronic signature (USERCODE) register and places it between the

TDI

and TDO pins, allowing the USERCODE to be serially shifted out of TDO.

IDCODE

Selects the IDCODE register and places it between TDI and TDO, allowing the IDCODE

to be serially shifted out of TDO.

ICR Instructions

These instructions are used when configuring an ACEX 1K device via JTAG ports using

a MasterBlaster, ByteBlasterMV, or BitBlaster download cable, or a Jam File (.jam) or

Jam Byte-Code File (.jbc) via an embedded processor.

Table 15. ACEX 1K Boundary-Scan Register Length

Device

Boundary-Scan Register Length

EP1K10

438

EP1K30

690

EP1K50

798

EP1K100

1,050

相關(guān)PDF資料	PDF描述
TAJF477M002RNJ	CAP TANT 470UF 2.5V 20% 2312
EPF10K10ATC144-3N	IC FLEX 10KA FPGA 10K 144-TQFP
EMC43DRTN-S93	CONN EDGECARD 86POS DIP .100 SLD
TPSC157K006R0090	CAP TANT 150UF 6.3V 10% 2312
EMC43DRTH-S93	CONN EDGECARD 86POS DIP .100 SLD

相關(guān)代理商/技術(shù)參數(shù)	參數(shù)描述
EP1K100QI208-2	功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - ACEX 1K 624 LABs 147 IOs RoHS:否制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP1K100QI208-2N	功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - ACEX 1K 624 LABs 147 IOs RoHS:否制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP1K10FC256-1	功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - ACEX 1K 72 LABs 136 IOs RoHS:否制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP1K10FC256-1N	功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - ACEX 1K 72 LABs 136 IOs RoHS:否制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP1K10FC256-2	功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - ACEX 1K 72 LABs 136 IOs RoHS:否制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256

發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

*型號	*數(shù)量	廠商	批號	封裝

添加更多采購

我的聯(lián)系方式

免费欧美网站_国产精品成熟老女人_一区二区国产精品视频_欧美野外猛男的大粗鳮_97神马电影_色就是色欧美_免费一区二区三区在线观看_国产精品熟女一区二区不卡_国产又粗又黄又猛_真实乱视频国产免费观看

采購需求

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

我的聯(lián)系方式