免费欧美网站_国产精品成熟老女人_一区二区国产精品视频_欧美野外猛男的大粗鳮_97神马电影_色就是色欧美_免费一区二区三区在线观看_国产精品熟女一区二区不卡_国产又粗又黄又猛_真实乱视频国产免费观看

您好，
買賣IC網歡迎您。
請登錄
免費注冊

您現在的位置：買賣IC網 > PDF目錄22011 > EP1K50QC208-1 (Altera)IC ACEX 1K FPGA 50K 208-PQFP PDF資料下載

參數資料

型號：	EP1K50QC208-1
廠商：	Altera
文件頁數：	83/86頁
文件大小：	0K
描述：	IC ACEX 1K FPGA 50K 208-PQFP
產品培訓模塊：	Three Reasons to Use FPGA's in Industrial Designs
標準包裝：	144
系列：	ACEX-1K®
LAB/CLB數：	360
邏輯元件/單元數：	2880
RAM 位總計：	40960
輸入/輸出數：	147
門數：	199000
電源電壓：	2.375 V ~ 2.625 V
安裝類型：	表面貼裝
工作溫度：	0°C ~ 70°C
封裝/外殼：	208-BFQFP
供應商設備封裝：	208-PQFP（28x28）
其它名稱：	544-1007

Altera Corporation

ACEX 1K Programmable Logic Device Family Data Sheet

During initialization, which occurs immediately after configuration, the

device resets registers, enables I/O pins, and begins to operate as a logic

device. Before and during configuration, all I/O pins (except dedicated

inputs, clock, or configuration pins) are pulled high by a weak pull-up

resistor. Together, the configuration and initialization processes are called

command mode; normal device operation is called user mode.

SRAM configuration elements allow ACEX 1K devices to be reconfigured

in-circuit by loading new configuration data into the device. Real-time

reconfiguration is performed by forcing the device into command mode

with a device pin, loading different configuration data, re-initializing the

device, and resuming user-mode operation. The entire reconfiguration

process requires less than 40 ms and can be used to reconfigure an entire

system dynamically. In-field upgrades can be performed by distributing

new configuration files.

Configuration Schemes

The configuration data for an ACEX 1K device can be loaded with one of

five configuration schemes (see Table 59), chosen on the basis of the target

application. An EPC16, EPC2, EPC1, or EPC1441 configuration device,

intelligent controller, or the JTAG port can be used to control the

configuration of a ACEX 1K device, allowing automatic configuration on

system power-up.

Multiple ACEX 1K devices can be configured in any of the five

configuration schemes by connecting the configuration enable (nCE) and

configuration enable output (nCEO) pins on each device. Additional

APEX 20K, APEX 20KE, FLEX 10K, FLEX 10KA, FLEX 10KE, ACEX 1K,

and FLEX 6000 devices can be configured in the same serial chain.

Device Pin-

Outs

See the Altera web site (http://www.altera.com) or the Altera Documen-

tation Library

for pin-out information.

Table 59. Data Sources for ACEX 1K Configuration

Configuration Scheme

Data Source

Configuration device

EPC16, EPC2, EPC1, or EPC1441 configuration device

Passive serial (PS)

BitBlaster or ByteBlasterMV download cables, or serial data

source

Passive parallel asynchronous (PPA)

Parallel data source

Passive parallel synchronous (PPS)

Parallel data source

JTAG

BitBlaster or ByteBlasterMV download cables, or

microprocessor with a Jam STAPL File or JBC File

相關PDF資料	PDF描述
ADM1032ARMZ-2	IC TEMP MONITOR 85DEG 8MSOP
AMM18DRMN-S288	CONN EDGECARD 36POS .156 EXTEND
RSO-2405D/H3	CONV DC/DC 1W 18-36VIN +/-05VOUT
EP1K100FC484-2	IC ACEX 1K FPGA 100K 484-FBGA
D15P13F6GL00LF	CONN DSUB PLUG 15POS T/H RA GOLD

相關代理商/技術參數	參數描述
EP1K50QC208-1DX	制造商:未知廠家制造商全稱:未知廠家功能描述:Field Programmable Gate Array (FPGA)
EP1K50QC208-1F	制造商:未知廠家制造商全稱:未知廠家功能描述:Field Programmable Gate Array (FPGA)
EP1K50QC208-1N	功能描述:FPGA - 現場可編程門陣列 FPGA - ACEX 1K 360 LABs 147 IOs RoHS:否制造商:Altera Corporation 系列:Cyclone V E 柵極數量: 邏輯塊數量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EP1K50QC208-1P	制造商:未知廠家制造商全稱:未知廠家功能描述:Field Programmable Gate Array (FPGA)
EP1K50QC208-1X	制造商:未知廠家制造商全稱:未知廠家功能描述:Field Programmable Gate Array (FPGA)

發布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

*型號	*數量	廠商	批號	封裝

添加更多采購

我的聯系方式

免费欧美网站_国产精品成熟老女人_一区二区国产精品视频_欧美野外猛男的大粗鳮_97神马电影_色就是色欧美_免费一区二区三区在线观看_国产精品熟女一区二区不卡_国产又粗又黄又猛_真实乱视频国产免费观看

采購需求

發布成功！您可以繼續發布采購。也可以進入我的后臺，查看報價

發布成功！您可以繼續發布采購。也可以進入我的后臺，查看報價

我的聯系方式