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參數資料
| 型號： | EP4CE6F17C7N |
| 廠商： | Altera |
| 文件頁數： | 36/42頁 |
| 文件大小： | 0K |
| 描述： | IC CYCLONE IV E FPGA 6K 256FBGA |
| 產品培訓模塊： | Designing an IP Surveillance Camera Three Reasons to Use FPGA's in Industrial Designs Cyclone IV FPGA Family Overview |
| 特色產品： | Cyclone? IV FPGAs |
| 標準包裝： | 90 |
| 系列： | CYCLONE® IV E |
| LAB/CLB數： | 392 |
| 邏輯元件/單元數： | 6272 |
| RAM 位總計： | 276480 |
| 輸入/輸出數： | 179 |
| 電源電壓： | 1.15 V ~ 1.25 V |
| 安裝類型： | 表面貼裝 |
| 工作溫度： | 0°C ~ 85°C |
| 封裝/外殼： | 256-BGA |
| 供應商設備封裝： | 256-FBGA（17x17） |
| 產品目錄頁面： | 602 (CN2011-ZH PDF) |
| 其它名稱： | 544-2652 |
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Chapter 1: Cyclone IV Device Datasheet
1–41
Glossary
December 2013
Altera Corporation
V
VCM(DC)
DC common mode input voltage.
VDIF(AC)
AC differential input voltage: The minimum AC input differential voltage required for switching.
VDIF(DC)
DC differential input voltage: The minimum DC input differential voltage required for switching.
VICM
Input common mode voltage: The common mode of the differential signal at the receiver.
VID
Input differential voltage swing: The difference in voltage between the positive and
complementary conductors of a differential transmission at the receiver.
VIH
Voltage input high: The minimum positive voltage applied to the input that is accepted by the
device as a logic high.
VIH(AC)
High-level AC input voltage.
VIH(DC)
High-level DC input voltage.
VIL
Voltage input low: The maximum positive voltage applied to the input that is accepted by the
device as a logic low.
VIL (AC)
Low-level AC input voltage.
VIL (DC)
Low-level DC input voltage.
VIN
DC input voltage.
VOCM
Output common mode voltage: The common mode of the differential signal at the transmitter.
VOD
Output differential voltage swing: The difference in voltage between the positive and
complementary conductors of a differential transmission at the transmitter. VOD = VOH – VOL.
VOH
Voltage output high: The maximum positive voltage from an output that the device considers is
accepted as the minimum positive high level.
VOL
Voltage output low: The maximum positive voltage from an output that the device considers is
accepted as the maximum positive low level.
VOS
Output offset voltage: VOS = (VOH + VOL) / 2.
VOX (AC)
AC differential output cross point voltage: the voltage at which the differential output signals
must cross.
VREF
Reference voltage for the SSTL and HSTL I/O standards.
VREF (AC)
AC input reference voltage for the SSTL and HSTL I/O standards. VREF(AC) = VREF(DC) + noise. The
peak-to-peak AC noise on VREF must not exceed 2% of VREF(DC).
VREF (DC)
DC input reference voltage for the SSTL and HSTL I/O standards.
VSWING (AC)
AC differential input voltage: AC input differential voltage required for switching. For the SSTL
differential I/O standard, refer to Input Waveforms.
VSWING (DC)
DC differential input voltage: DC input differential voltage required for switching. For the SSTL
differential I/O standard, refer to Input Waveforms.
VTT
Termination voltage for the SSTL and HSTL I/O standards.
VX (AC)
AC differential input cross point voltage: The voltage at which the differential input signals must
cross.
W
——
X
——
Y
——
Z
——
Table 1–46. Glossary (Part 5 of 5)
Letter
Term
Definitions
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相關代理商/技術參數 |
參數描述 |
|---|---|
| EP4CE6F17C8 | 功能描述:FPGA - 現場可編程門陣列 FPGA - Cyclone IV E 392 LABs 179 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數量: 邏輯塊數量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256 |
| EP4CE6F17C8L | 功能描述:FPGA - 現場可編程門陣列 FPGA - Cyclone IV E 392 LABs 179 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數量: 邏輯塊數量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256 |
| EP4CE6F17C8LN | 功能描述:FPGA - 現場可編程門陣列 FPGA - Cyclone IV E 392 LABs 179 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數量: 邏輯塊數量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256 |
| EP4CE6F17C8N | 功能描述:FPGA - 現場可編程門陣列 FPGA - Cyclone IV E 392 LABs 179 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數量: 邏輯塊數量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256 |
| EP4CE6F17C9L | 功能描述:FPGA - 現場可編程門陣列 FPGA - Cyclone IV E 392 LABs 179 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數量: 邏輯塊數量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256 |
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