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參數(shù)資料
| 型號： | GS8642Z18GB-300 |
| 廠商： | GSI TECHNOLOGY |
| 元件分類： | DRAM |
| 英文描述： | 72Mb Pipelined and Flow Through Synchronous NBT SRAM |
| 中文描述： | 4M X 18 ZBT SRAM, 5.5 ns, PBGA119 |
| 封裝： | 14 X 22 MM, 1.27 MM PITCH, ROHS COMPLIANT, FPBGA-119 |
| 文件頁數(shù)： | 20/34頁 |
| 文件大?。?/td> | 872K |
| 代理商： | GS8642Z18GB-300 |
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AC Electrical Characteristics
Parameter
Symbol
-300
-250
-200
-167
Unit
Min
3.3
Max
—
Min
4.0
Max
—
Min
5.0
Max
—
Min
6.0
Max
—
Pipeline
Clock Cycle Time
Clock to Output Valid
(x18/x36)
Clock to Output Valid
(x72)
Clock to Output Invalid
tKC
ns
tKQ
—
2.3
—
2.5
—
3.0
—
3.5
ns
tKQ
—
3.0
—
3.0
—
3.0
—
3.5
ns
tKQX
1.5
—
1.5
—
1.5
—
1.5
—
ns
Clock to Output in Low-Z
tLZ
1
tS
tH
tKC
tKQ
tKQX
1.5
—
1.5
—
1.5
—
1.5
—
ns
Setup time
Hold time
Clock Cycle Time
Clock to Output Valid
Clock to Output Invalid
1.1
0.1
5.5
—
3.0
—
—
—
5.5
—
1.2
0.2
6.5
—
3.0
—
—
—
6.5
—
1.4
0.4
7.5
—
3.0
—
—
—
7.5
—
1.5
0.5
8.0
—
3.0
—
—
—
8.0
—
ns
ns
ns
ns
ns
Flow
Through
Clock to Output in Low-Z
tLZ
1
tS
tH
tKH
tKL
3.0
—
3.0
—
3.0
—
3.0
—
ns
Setup time
Hold time
Clock HIGH Time
Clock LOW Time
Clock to Output in
High-Z (x18/x36)
Clock to Output in
High-Z (x72)
G to Output Valid
(x18/x36)
G to Output Valid
(x72)
1.5
0.5
1.0
1.2
—
—
—
—
1.5
0.5
1.3
1.5
—
—
—
—
1.5
0.5
1.3
1.5
—
—
—
—
1.5
0.5
1.3
1.5
—
—
—
—
ns
ns
ns
ns
tHZ
1
1.5
2.3
1.5
2.5
1.5
3.0
1.5
3.0
ns
tHZ
1
1.5
3.0
1.5
3.0
1.5
3.0
1.5
3.0
ns
tOE
—
2.3
—
2.5
—
3.0
—
3.5
ns
tOE
—
3.0
—
3.0
—
3.0
—
3.5
ns
G to output in Low-Z
tOLZ
1
0
—
0
—
0
—
0
—
ns
G to output in High-Z
(x18/36)
G to output in High-Z
(x72)
tOHZ
1
—
2.3
—
2.5
—
3.0
—
3.0
ns
tOHZ
1
—
3.0
—
3.0
—
3.0
—
3.0
ns
ZZ setup time
tZZS
2
5
—
5
—
5
—
5
—
ns
ZZ hold time
tZZH
2
tZZR
1
—
1
—
1
—
1
—
ns
ZZ recovery
20
—
20
—
20
—
20
—
ns
Product Preview
GS8642Z18(B)/GS8642Z36(B)/GS8642Z72(C)
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.02 5/2005
20/34
2004, GSI Technology
Notes:
1.
2.
These parameters are sampled and are not 100% tested.
ZZ is an asynchronous signal. However, in order to be recognized on any given clock cycle, ZZ must meet the specified setup and hold
times as specified above.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| GS8642Z18GB-300I | 72Mb Pipelined and Flow Through Synchronous NBT SRAM |
| GS8642Z36B-167 | 72Mb Pipelined and Flow Through Synchronous NBT SRAM |
| GS8642Z36B-167I | 72Mb Pipelined and Flow Through Synchronous NBT SRAM |
| GS8642Z36B-200 | 72Mb Pipelined and Flow Through Synchronous NBT SRAM |
| GS8642Z36B-200I | 72Mb Pipelined and Flow Through Synchronous NBT SRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| GS8642Z18GB-300I | 制造商:GSI 制造商全稱:GSI Technology 功能描述:72Mb Pipelined and Flow Through Synchronous NBT SRAM |
| GS8642Z36B-167 | 制造商:GSI 制造商全稱:GSI Technology 功能描述:72Mb Pipelined and Flow Through Synchronous NBT SRAM |
| GS8642Z36B-167I | 制造商:GSI 制造商全稱:GSI Technology 功能描述:72Mb Pipelined and Flow Through Synchronous NBT SRAM |
| GS8642Z36B-167IV | 制造商:GSI Technology 功能描述:SRAM SYNC QUAD 1.8V/2.5V 72MBIT 2MX36 8NS/3.5NS 119FPBGA - Trays |
| GS8642Z36B-167V | 制造商:GSI Technology 功能描述:SRAM SYNC QUAD 1.8V/2.5V 72MBIT 2MX36 8NS/3.5NS 119FPBGA - Trays |
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