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參數資料
| 型號： | GS9021A |
| 廠商： | Gennum Corporation |
| 英文描述： | GENLINX -TM II GS9021A EDH Coprocessor |
| 中文描述： | GENLINX -商標二GS9021A硬腦膜外血腫協處理器 |
| 文件頁數： | 5/26頁 |
| 文件大小： | 245K |
| 代理商： | GS9021A |
19983 - 1
5 of 26
G
28, 29
S[1:0]
I/O
Control bits which select whether FF, AP, or ANC EDH flags are active on the EDH
flag data port (FL[4:0]). In FLAG_MAP mode, the S[1:0] pins become outputs
(see device description).
30-34
FL[4:0]
I/O
EDH flag data port to allow access to the EDH flags.
35
F_R/W
I
Flag port read/write control. When HIGH, FL[4:0] are configured as outputs
allowing EDH flags to be read from the device. When LOW, FL[4:0] are
configured as inputs allowing EDH flags to be overwritten into the outgoing EDH
packet. In FLAG_MAP mode this pin must be set HIGH.
36
FLAG_MAP
I
FLAG_MAP mode enable. When HIGH, FLAG_MAP mode is enabled. When
LOW, FLAG_MAP mode is disabled.
37-39, 42-48
DOUT[9:0]
O
Parallel digital video data outputs.
49
V
O
Vertical sync indication.
50
H
O
Horizontal sync indication.
51-53
F[2:0]
O
Field indication. F2 is the MSB.
54
RESET
I
Reset. When LOW, the internal control circuitry is reset.
55
R/T
I
Receive/Transmit mode select. When HIGH, the device operates in receive mode.
When LOW, the device operates in transmit mode.
58
CRC_MODE
I
CRC_MODE enable. When HIGH, CRC_MODE is enabled. When LOW,
CRC_MODE is disabled.
59
VBLANKS/L
I
Vertical blanking interval control. For NTSC signals, when VBLANKS/L is set LOW
the 19 line blanking interval is selected and when set HIGH the 9 line blanking
interval is selected. For PAL D2 signals, when VBLANKS/L is set LOW the 17 line
blanking interval is selected and when set HIGH the 7 line blanking interval is
selected. For PAL component signals VBLANKS/L should be set LOW.
60
BYPASS_EDH
I
Bypass EDH control. When HIGH, the device allows the EDH packet to pass
through unaltered.
61
LSB_TOP
I
Data output LSB position control. When HIGH, the video data output bus is
reversed, placing the LSB at pin 48.
62
BLANK_EN
I
Blanking enable. When LOW, incoming data words are set to appropriate
blanking levels.
63
FLYWDIS
I
Flywheel disable. When HIGH, the internal flywheel is disabled. When LOW, the
internal flywheel is enabled.
64
CLIP_TRS
I
Clip and TRS correction control. When HIGH, the TRS Blanking, ITU-R-601
clipping and TRS insertion features are enabled.
8, 26, 41, 57
V
DD
Power supply (nominally +5V).
9, 27, 40, 56
GND
Ground.
PIN DESCRIPTIONS
NUMBER
SYMBOL
TYPE
DESCRIPTION
相關PDF資料 |
PDF描述 |
|---|---|
| GS9021ACFU | GENLINX -TM II GS9021A EDH Coprocessor |
| GS9022-CPJ | Digital Video Serializer |
| GS9022 | Digital Video Serializer |
| GS9022-CTJ | Digital Video Serializer |
| GS9022ACPJE3 | GENLINXTM GS9022A Digital Video Serializer |
相關代理商/技術參數 |
參數描述 |
|---|---|
| GS9021ACFU | 制造商:Rochester Electronics LLC 功能描述: 制造商:Gennum Corporation 功能描述: |
| GS9021ACFUE3 | 制造商:Semtech Corporation 功能描述: 制造商:Semtech Corporation 功能描述:EDH Co-Processer |
| GS9021-CFU | 制造商:Gennum Corporation 功能描述: |
| GS9021-CTU | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:EDH Coprocessor |
| GS9022 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Digital Video Serializer |
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