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參數資料
| 型號： | GS9023ACFY |
| 廠商： | Gennum Corporation |
| 元件分類： | Codec |
| 英文描述： | GENLINX -TM II GS9023A Embedded Audio CODEC |
| 中文描述： | GENLINX -商標二GS9023A嵌入式音頻編解碼器 |
| 文件頁數： | 17/37頁 |
| 文件大小： | 318K |
| 代理商： | GS9023ACFY |
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G
GENNUM CORPORATION
19795 - 6
RATE: Sampling frequency.
The GS9023A operates at a
fixed sampling frequency of 48kHz. The audio control
packet RATE word structure is shown in Table 7.
The audio control packet RATE word bits are defined as
follows:
x[2:0], y[2:0]:
Audio sampling rate for subframe 1 and 2
respectively. Fixed at 48kHz.
async, bsync:
Set LOW when each audio channel pair is
operating synchronously and set HIGH when operating
asynchronously.
Forced
LOW
operation.
due
to
synchronous
ACT:
The ACT word indicates the active group channels.
The audio control packet ACT word structure is shown in
Table 8.
The audio control packet ACT word bits are defined as
follows:
p:
Even parity for bits b0 to b7.
a(4-1): Individual active channel status indicator.
The bits
correspond directly to the “CHACT(4-1)” bits of Host
Interface Register #1h. The bits are set HIGH for each
active channel in a given audio group. The correlation of the
active channels for the four active audio groups is shown in
Table 9.
DELx(0-2):
Indicates the amount of accumulated audio
processing delay relative to video, measured in audio
sample intervals for each of the channels. Positive values
indicate that the video leads the audio. The audio control
packets delay word structure is shown in Table 10.
The audio control packet delay word bits are defined as
follows:
e:
Indicates valid audio delay data when set HIGH.
Corresponds to the “ACDLY” bit of Host Interface Register
#Dh.
dela/b[25:0]:
The audio channel pair delay is programmed
in bits “DELA/B[25:0]” of Host Interface Register #Ah, #Bh,
#Ch and #Dh. DELA[25:0] corresponds to the delay for
channels 1 and 2. “DELB[25:0]” corresponds to the delay
for channels 3 and 4.
RSRV: Reserved.
The word is fixed at 200h and is
automatically generated by the GS9023A.
CS: Checksum.
The checksum consists of nine bits. The
checksum is used to determine the validity of the words
data ID through user data. It is the sum of the nine least
significant bits of the words data ID through user data. The
checksum is automatically generated by the GS9023A.
TABLE 7 AUDIO CONTROL PACKET RATE WORD STRUCTURE
BIT
RATE WORD
b9
not b8
b8
not used (fixed to 0)
b7
y2 (MSB, fixed to 0)
b6
y1 (fixed to 0)
b5
y0 (LSB, fixed to 0)
b4
bsync
b3
x2 (MSB, fixed to 0)
b2
x1 (fixed to 0)
b1
x0 (LSB, fixed to 0)
b0
async
TABLE 8 AUDIO CONTROL PACKET ACT WORD STRUCTURE
BIT
ACT WORD
b9
not b8
b8
p
b7
reserved (set to 0)
b6
reserved (set to 0)
b5
reserved (set to 0)
b4
reserved (set to 0)
b3
a4
b2
a3
b1
a2
b0
a1
TABLE 9 AUDIO CONTROL PACKET ACTIVE CHANNEL CON-
FIGURATION
GROUP1
GROUP2
GROUP3
GROUP4
CHACT 1
Channel 1
Channel 5
Channel 9
Channel 13
CHACT 2
Channel 2
Channel 6
Channel 10
Channel 14
CHACT 3
Channel 3
Channel 7
Channel 11
Channel 15
CHACT 4
Channel 4
Channel 8
Channel 12
Channel 16
TABLE 10 AUDIO CONTROL PACKET DELAY STRUCTURE
BIT
DELX0
DELX1
DELX2
b9
not b8
not b8
not b8
b8
dela/b 7
dela/b 16
dela/b 25 (Sign)
b7
dela/b 6
dela/b 15
dela/b 24 (MSB)
b6
dela/b 5
dela/b 14
dela/b 23
b5
dela/b 4
dela/b 13
dela/b 22
b4
dela/b 3
dela/b 12
dela/b 21
b3
dela/b 2
dela/b 11
dela/b 20
b2
dela/b 1
dela/b 10
dela/b 19
b1
dela/b 0
(LSB)
dela/b 9
dela/b 18
b0
e
dela/b 8
dela/b 17
相關PDF資料 |
PDF描述 |
|---|---|
| GS9023 | Embedded Audio CODEC |
| GS9023-CFY | Aluminum Electrolytic Radial Leaded Bi-Polar Capacitor; Capacitance: 100uF; Voltage: 63V; Case Size: 12.5x20 mm; Packaging: Bulk |
| GS9024 | Automatic Cable Equalizer |
| GS9024-CKB | Automatic Cable Equalizer |
| GS9024-CTB | Automatic Cable Equalizer |
相關代理商/技術參數 |
參數描述 |
|---|---|
| GS9023ACFYE3 | 制造商:Semtech Corporation 功能描述:Audio Codec 4ADC / 4DAC 24-Bit 100-Pin LQFP |
| GS9023B | 制造商:GENNUM 制造商全稱:GENNUM 功能描述:Embedded Audio CODEC |
| GS9023BCVE3 | 功能描述:IC AUDIO CODEC 100PIN TQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編解碼器 系列:- 標準包裝:2,500 系列:- 類型:立體聲音頻 數據接口:串行 分辨率（位）:18 b ADC / DAC 數量:2 / 2 三角積分調變:是 S/N 比，標準 ADC / DAC (db):81.5 / 88 動態范圍，標準 ADC / DAC (db):82 / 87.5 電壓 - 電源，模擬:2.6 V ~ 3.3 V 電壓 - 電源，數字:1.7 V ~ 3.3 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-WFQFN 裸露焊盤 供應商設備封裝:48-TQFN-EP（7x7） 包裝:帶卷 (TR) |
| GS9023-CFY | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Embedded Audio CODEC |
| GS9024 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Automatic Cable Equalizer |
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