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參數資料
| 型號： | LMC6484MN |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 運算放大器 |
| 英文描述： | CMOS Quad Rail-to-Rail Input and Output Operational Amplifier |
| 中文描述： | QUAD OP-AMP, 3800 uV OFFSET-MAX, 1.5 MHz BAND WIDTH, PDIP14 |
| 封裝： | PLASTIC, DIP-14 |
| 文件頁數： | 13/22頁 |
| 文件大小： | 973K |
| 代理商： | LMC6484MN |
Application Information
(Continued)
loading reduces the phase margin of op-amps. The combi-
nation of the op-amp’s output impedance and the capacitive
load induces phase lag. This results in either an under-
damped pulse response or oscillation.
Capacitive load compensation can be accomplished using
resistive isolation as shown in Figure 4 This simple tech-
nique is useful for isolating the capacitive input of multiplex-
ers and A/D converters.
Improved frequency response is achieved by indirectly driv-
ing capacitive loads as shown in Figure 6
R1 and C1 serve to counteract the loss of phase margin by
feeding forward the high frequency component of the output
signal back to the amplifier’s inverting input, thereby preserv-
ing phase margin in the overall feedback loop. The values of
R1 and C1 are experimentally determined for the desired
pulse response. The resulting pulse response can be seen in
Figure 7
5.0 Compensating for Input Capacitance
It is quite common to use large values of feedback resis-
tance with amplifiers that have ultra-low input current, like
the LMC6484. Large feedback resistors can react with small
values of input capacitance due to transducers, photo-
diodes, and circuit board parasitics to reduce phase
margins.
The effect of input capacitance can be compensated for by
adding a feedback capacitor. The feedback capacitor (as in
Figure 8 ), C
f
, is first estimated by:
or
R
1
C
IN
≤
R
2
C
f
which typically provides significant overcompensation.
Printed circuit board stray capacitance may be larger or
smaller than that of a breadboard, so the actual optimum
value for C
may be different. The values of C
should be
checked on the actual circuit. (Refer to the LMC660 quad
CMOS amplifier data sheet for a more detailed discussion.)
6.0 Printed-Circuit-Board Layout for High-Impedance
Work
It is generally recognized that any circuit which must operate
with less than 1000 pA of leakage current requires special
layout of the PC board. when one wishes to take advantage
DS011714-17
FIGURE 4. Resistive Isolation
of a 330 pF Capacitive Load
DS011714-18
FIGURE 5. Pulse Response of
the LMC6484 Circuit in
Figure 4
DS011714-15
FIGURE 6. LMC6484 Non-Inverting Amplifier,
Compensated to Handle a 330 pF Capacitive Load
DS011714-16
FIGURE 7. Pulse Response of
LMC6484 Circuit in
Figure 6
DS011714-19
FIGURE 8. Canceling the Effect of Input Capacitance
www.national.com
13
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相關代理商/技術參數 |
參數描述 |
|---|---|
| LMC6484N | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CMOS Quad Rail-to-Rail Input and Output Operational Amplifier(970.84 k) |
| LMC6492 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:CMOS Rail-to-Rail Input and Output Operational Amplifier |
| LMC6492AEM | 功能描述:運算放大器 - 運放 RoHS:否 制造商:STMicroelectronics 通道數量:4 共模抑制比（最小值）:63 dB 輸入補償電壓:1 mV 輸入偏流（最大值）:10 pA 工作電源電壓:2.7 V to 5.5 V 安裝風格:SMD/SMT 封裝 / 箱體:QFN-16 轉換速度:0.89 V/us 關閉:No 輸出電流:55 mA 最大工作溫度:+ 125 C 封裝:Reel |
| LMC6492AEM/NOPB | 功能描述:運算放大器 - 運放 CMOS Dual RRIO Auto Temp Amp RoHS:否 制造商:STMicroelectronics 通道數量:4 共模抑制比（最小值）:63 dB 輸入補償電壓:1 mV 輸入偏流（最大值）:10 pA 工作電源電壓:2.7 V to 5.5 V 安裝風格:SMD/SMT 封裝 / 箱體:QFN-16 轉換速度:0.89 V/us 關閉:No 輸出電流:55 mA 最大工作溫度:+ 125 C 封裝:Reel |
| LMC6492AEMX | 功能描述:運算放大器 - 運放 RoHS:否 制造商:STMicroelectronics 通道數量:4 共模抑制比（最小值）:63 dB 輸入補償電壓:1 mV 輸入偏流（最大值）:10 pA 工作電源電壓:2.7 V to 5.5 V 安裝風格:SMD/SMT 封裝 / 箱體:QFN-16 轉換速度:0.89 V/us 關閉:No 輸出電流:55 mA 最大工作溫度:+ 125 C 封裝:Reel |
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