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參數資料
| 型號： | LMC660 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | CMOS Quad Operational Amplifier |
| 中文描述： | 的CMOS四路運算放大器 |
| 文件頁數： | 7/14頁 |
| 文件大小： | 461K |
| 代理商： | LMC660 |
Application Hints
(Continued)
Every amplifier has some capacitance between each input
and AC ground, and also some differential capacitance be-
tween the inputs. When the feedback network around an
amplifier is resistive, this input capacitance (along with any
additional capacitance due to circuit board traces, the
socket, etc.) and the feedback resistors create a pole in the
feedback path. In the following General OperationalAmplifier
circuit, Figure 2 the frequency of this pole is
where C
is the total capacitance at the inverting input, in-
cluding amplifier input capcitance and any stray capacitance
from the IC socket (if one is used), circuit board traces, etc.,
and R
is the parallel combination of R
and R
. This for-
mula, as well as all formulae derived below, apply to invert-
ing and non-inverting op-amp configurations.
When the feedback resistors are smaller than a few k
, the
frequency of the feedback pole will be quite high, since C
is
generally less than 10 pF. If the frequency of the feedback
pole is much higher than the “ideal” closed-loop bandwidth
(the nominal closed-loop bandwidth in the absence of C
),
the pole will have a negligible effect on stability, as it will add
only a small amount of phase shift.
However, if the feedback pole is less than approximately 6 to
10 times the “ideal” 3 dB frequency, a feedback capacitor,
C
, should be connected between the output and the invert-
ing input of the op amp. This condition can also be stated in
terms of the amplifier’s low-frequency noise gain: To main-
tain stability a feedback capacitor will probably be needed if
where
is the amplifier’s low-frequency noise gain and GBW is the
amplifier’s gain bandwidth product. An amplifier’s low-
frequency noise gain is represented by the formula
regardless of whether the amplifier is being used in inverting
or non-inverting mode. Note that a feedback capacitor is
more likely to be needed when the noise gain is low and/or
the feedback resistor is large.
If the above condition is met (indicating a feedback capacitor
will probably be needed), and the noise gain is large enough
that:
the following value of feedback capacitor is recommended:
If
the feedback capacitor should be:
Note that these capacitor values are usually significant
smaller than those given by the older, more conservative for-
mula:
Using the smaller capacitors will give much higher band-
width with little degradation of transient response. It may be
necessary in any of the above cases to use a somewhat
larger feedback capacitor to allow for unexpected stray ca-
pacitance, or to tolerate additional phase shifts in the loop, or
excessive capacitive load, or to decrease the noise or band-
width, or simply because the particular circuit implementa-
tion needs more feedback capacitance to be sufficiently
stable. For example, a printed circuit board’s stray capaci-
tance may be larger or smaller than the breadboard’s, so the
actual optimum value for C
may be different from the one
estimated using the breadboard. In most cases, the values
of C
should be checked on the actual circuit, starting with
the computed value.
Capacitive Load Tolerance
Like many other op amps, the LMC660 may oscillate when
its applied load appears capacitive. The threshold of oscilla-
tion varies both with load and circuit gain. The configuration
most sensitive to oscillation is a unity-gain follower. See
Typical Performance Characteristics.
The load capacitance interacts with the op amp’s output re-
sistance to create an additional pole. If this pole frequency is
sufficiently low, it will degrade the op amp’s phase margin so
that the amplifier is no longer stable at low gains. As shown
in Figure 3 the addition of a small resistor (50
to 100
) in
series with the op amp’s output, and a capacitor (5 pF to
10 pF) from inverting input to output pins, returns the phase
margin to a safe value without interfering with lower-
frequency circuit operation. Thus larger values of capaci-
tance can be tolerated without oscillation. Note that in all
cases, the output will ring heavily when the load capacitance
is near the threshold for oscillation.
DS008767-6
S
consists of the amplifier’s input cacompensates for the pole caused by
C
F
C
S
and the feedback resistors.
FIGURE 2. General Operational Amplifier Circuit
www.national.com
7
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| LMC662AIM | CMOS Dual Operational Amplifier |
| LMC662AIN | CMOS Dual Operational Amplifier |
| LMC662AMD | CMOS Dual Operational Amplifier |
| LMC662CM | CMOS Dual Operational Amplifier |
| LMC662CN | CMOS Dual Operational Amplifier |
相關代理商/技術參數 |
參數描述 |
|---|---|
| LMC660_00 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:CMOS Quad Operational Amplifier |
| LMC660_06 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:CMOS Quad Operational Amplifier |
| LMC660AI | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:CMOS Quad Operational Amplifier |
| LMC660AIM | 功能描述:運算放大器 - 運放 RoHS:否 制造商:STMicroelectronics 通道數量:4 共模抑制比（最小值）:63 dB 輸入補償電壓:1 mV 輸入偏流（最大值）:10 pA 工作電源電壓:2.7 V to 5.5 V 安裝風格:SMD/SMT 封裝 / 箱體:QFN-16 轉換速度:0.89 V/us 關閉:No 輸出電流:55 mA 最大工作溫度:+ 125 C 封裝:Reel |
| LMC660AIM/NOPB | 功能描述:運算放大器 - 運放 CMOS Quad Op Amp RoHS:否 制造商:STMicroelectronics 通道數量:4 共模抑制比（最小值）:63 dB 輸入補償電壓:1 mV 輸入偏流（最大值）:10 pA 工作電源電壓:2.7 V to 5.5 V 安裝風格:SMD/SMT 封裝 / 箱體:QFN-16 轉換速度:0.89 V/us 關閉:No 輸出電流:55 mA 最大工作溫度:+ 125 C 封裝:Reel |
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