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參數(shù)資料
| 型號： | LMC662EN |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 運算放大器 |
| 英文描述： | CMOS Dual Operational Amplifier |
| 中文描述： | DUAL OP-AMP, 6500 uV OFFSET-MAX, 1.4 MHz BAND WIDTH, PDIP8 |
| 封裝： | DIP-8 |
| 文件頁數(shù)： | 6/13頁 |
| 文件大小： | 430K |
| 代理商： | LMC662EN |
Application Hints
(Continued)
COMPENSATING INPUT CAPACITANCE
The high input resistance of the LMC662 op amps allows the
use of large feedback and source resistor values without los-
ing gain accuracy due to loading. However, the circuit will be
especially sensitive to its layout when these large-value re-
sistors are used.
Every amplifier has some capacitance between each input
and AC ground, and also some differential capacitance be-
tween the inputs. When the feedback network around an
amplifier is resistive, this input capacitance (along with any
additional capacitance due to circuit board traces, the
socket, etc.) and the feedback resistors create a pole in the
feedback path. In the following General OperationalAmplifier
Circuit, Figure 2 the frequency of this pole is
where C
is the total capacitance at the inverting input, in-
cluding amplifier input capacitance and any stray capaci-
tance from the IC socket (if one is used), circuit board traces,
etc., and R
is the parallel combination of R
and R
. This
formula, as well as all formulae derived below, apply to in-
verting and non-inverting op-amp configurations.
When the feedback resistors are smaller than a few k
, the
frequency of the feedback pole will be quite high, since C
is
generally less than 10 pF. If the frequency of the feedback
pole is much higher than the “ideal” closed-loop bandwidth
(the nominal closed-loop bandwidth in the absence of C
),
the pole will have a negligible effect on stability, as it will add
only a small amount of phase shift.
However, if the feedback pole is less than approximately 6 to
10 times the “ideal” 3 dB frequency, a feedback capacitor,
C
, should be connected between the output and the invert-
ing input of the op amp. This condition can also be stated in
terms of the amplifier’s low-frequency noise gain: To main-
tain stability, a feedback capacitor will probably be needed if
where
is the amplifier’s low-frequency noise gain and GBW is the
amplifier’s
gain
bandwidth
low-frequency noise gain is represented by the formula
product.
An
amplifier’s
regardless of whether the amplifier is being used in an invert-
ing or non-inverting mode. Note that a feedback capacitor is
more likely to be needed when the noise gain is low and/or
the feedback resistor is large.
If the above condition is met (indicating a feedback capacitor
will probably be needed), and the noise gain is large enough
that:
the following value of feedback capacitor is recommended:
If
the feedback capacitor should be:
Note that these capacitor values are usually significantly
smaller than those given by the older, more conservative for-
mula:
Using the smaller capacitors will give much higher band-
width with little degradation of transient response. It may be
necessary in any of the above cases to use a somewhat
larger feedback capacitor to allow for unexpected stray ca-
pacitance, or to tolerate additional phase shifts in the loop, or
excessive capacitive load, or to decrease the noise or band-
width, or simply because the particular circuit implementa-
tion needs more feedback capacitance to be sufficiently
stable. For example, a printed circuit board’s stray capaci-
tance may be larger or smaller than the breadboard’s, so the
actual optimum value for C
may be different from the one
estimated using the breadboard. In most cases, the value of
C
should be checked on the actual circuit, starting with the
computed value.
CAPACITIVE LOAD TOLERANCE
Like many other op amps, the LMC662 may oscillate when
its applied load appears capacitive. The threshold of oscilla-
tion varies both with load and circuit gain. The configuration
most sensitive to oscillation is a unity-gain follower. See the
Typical Performance Characteristics.
The load capacitance interacts with the op amp’s output re-
sistance to create an additional pole. If this pole frequency is
sufficiently low, it will degrade the op amp’s phase margin so
that the amplifier is no longer stable at low gains. As shown
in Figure 3 the addition of a small resistor (50
to 100
) in
series with the op amp’s output, and a capacitor (5 pF to 10
pF) from inverting input to output pins, returns the phase
DS009763-6
S
consists of the amplifier’s input cacompensates for the pole caused by
C
F
C
S
and the feedback resistor.
FIGURE 2. General Operational Amplifier Circuit
www.national.com
6
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| LMC6681B1MX | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Low Voltage, Rail-To-Rail Input and Output CMOS |
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