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參數資料
| 型號： | MH4M36CJD-6 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | FAST PAGE MODE ( 4194304-WORD BY 36-BIT ) DYNAMIC RAM |
| 中文描述： | 快速頁面模式（4194304 - Word的36位）動態隨機存儲器 |
| 文件頁數： | 6/14頁 |
| 文件大小： | 130K |
| 代理商： | MH4M36CJD-6 |
MITSUBISHI
ELECTRIC
( 6
FAST PAGE MODE ( 4194304-WORD BY 36-BIT ) DYNAMIC RAM
MH4M36CJD-5,-6,-7
MITSUBISHI LSIs
Jun/17/1996
MIT-DS-0035-0.0
Fast-Page Mode Cycle (Read, Early Write Cycle)
(Note 21)
Note 21: All previously specified timing requirements and switching characteristics are applicable to their respective fast page mode cycle.
22: t
RAS(min)
is specified as two cycles of CAS input are performed.
23: t
CP(max)
is specified as a reference point only.
Limits
Min
Max
Parameter
Fast page mode read/write cycle time
RAS iow pulse width for read write cycle
CAS high pulse width
RAS hold time after CAS precharge
Symbol
t
PC
Unit
Min
Max
Min
Max
MH4M36CJD-5
MH4M36CJD-6
MH4M36CJD-7
ns
ns
ns
ns
ns
t
RAS
t
CP
t
CPRH
t
CPWD
(Note22)
(Note23)
35
53
40
95
8
Delay time, CAS precharge to W iow
12
125000
40
60
45
110
10
15
125000
45
65
50
125
10
15
125000
CAS before RAS Refresh Cycle
(Note 24)
Limits
Min
10
10
Max
Parameter
CAS setup time before RAS low
CAS hold time after RAS low
Symbol
t
CSR
t
CHR
t
RSR
t
RHR
Unit
Min
10
10
Max
Min
10
15
Max
MH4M36CJD-5
MH4M36CJD-6
MH4M36CJD-7
ns
ns
ns
ns
10
10
Read setup time before RAS low
Read hold time after RAS low
10
10
10
15
Note 24: Eight or more CAS before RAS cycles instead of eight RAS cycles are necessary for proper operation of CAS before RAS refresh
mode.
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| MH4M36CJD-7 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:FAST PAGE MODE ( 4194304-WORD BY 36-BIT ) DYNAMIC RAM |
| MH4M36DJD-7 | 制造商:Mitsubishi Electric 功能描述: |
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| MH4S64BBKG-10L | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:268435456-BIT (4194304 - WORD BY 64-BIT)SynchronousDRAM |
| MH4S64BBKG-7 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:268435456-BIT (4194304 - WORD BY 64-BIT)SynchronousDRAM |
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