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參數資料
| 型號： | MTP5N40E |
| 廠商： | MOTOROLA INC |
| 元件分類： | JFETs |
| 英文描述： | TMOS POWER FET 5.0 AMPERES 400 VOLTS RDS(on) = 1.0 OHM |
| 中文描述： | 5 A, 400 V, 1 ohm, N-CHANNEL, Si, POWER, MOSFET, TO-220AB |
| 文件頁數： | 1/8頁 |
| 文件大小： | 258K |
| 代理商： | MTP5N40E |
1
Motorola, Inc. 1996
N–Channel Enhancement–Mode Silicon Gate
This advanced high voltage TMOS E–FET is designed to
withstand high energy in the avalanche mode and switch efficiently.
This new high energy device also offers a drain–to–source diode
with fast recovery time. Designed for high voltage, high speed
switching applications such as power supplies, PWM motor
controls and other inductive loads, the avalanche energy capability
is specified to eliminate the guesswork in designs where inductive
loads are switched and offer additional safety margin against
unexpected voltage transients.
Avalanche Energy Capability Specified at Elevated
Temperature
Low Stored Gate Charge for Efficient Switching
Internal Source–to–Drain Diode Designed to Replace External
Zener Transient Suppressor — Absorbs High Energy in the
Avalanche Mode
Source–to–Drain Diode Recovery Time Comparable to Discrete
Fast Recovery Diode
MAXIMUM RATINGS
(TC = 25
°
C unless otherwise noted)
Rating
Symbol
Value
Unit
Drain–Source Voltage
VDSS
VDGR
VGS
VGSM
400
Vdc
Drain–Gate Voltage (RGS = 1.0 M
)
Gate–Source Voltage — Continuous
Gate–Source Voltage
— Non–repetitive
400
Vdc
±
20
±
40
Vdc
Vpk
Drain Current — Continuous
Drain Current
— Pulsed
ID
IDM
5.0
12
Adc
Total Power Dissipation @ TC = 25
°
C
Derate above 25
°
C
PD
75
0.6
Watts
W/
°
C
Operating and Storage Temperature Range
TJ, Tstg
–55 to 150
°
C
UNCLAMPED DRAIN–TO–SOURCE AVALANCHE CHARACTERISTICS
(TJ < 150
°
C)
Single Pulse Drain–to–Source Avalanche Energy — TJ = 25
°
C
Single Pulse Drain–to–Source Avalanche Energy
— TJ = 100
°
C
Repetitive Pulse Drain–to–Source Avalanche Energy
WDSR (1)
WDSR (2)
290
46
7.4
mJ
THERMAL CHARACTERISTICS
Thermal Resistance — Junction to Case
Thermal Resistance
— Junction to Ambient
°
R
θ
JC
R
θ
JA
TL
1.67
62.5
°
C/W
Maximum Lead Temperature for Soldering Purposes, 1/8
″
from case for 10 seconds
260
°
C
(1) VDD = 50 V, ID = 5.0 A
(2) Pulse Width and frequency is limited by TJ(max) and thermal response
Designer’s Data for “Worst Case” Conditions
— The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit
curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.
E–FET and Designer’s are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.
Preferred
devices are Motorola recommended choices for future use and best overall value.
REV 1
Order this document
by MTP5N40E/D
SEMICONDUCTOR TECHNICAL DATA
TMOS POWER FET
5.0 AMPERES
400 VOLTS
RDS(on) = 1.0 OHM
D
S
G
CASE 221A–06, Style 5
TO–220AB
Motorola Preferred Device
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