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?2008 Fairchild Semiconductor Corporation

www.fairchildsemi.com

SG6901A " Rev. 1.0.2

16

To achieve good power factor, the voltage for V

RMS

and

V

EA

should be kept as constant as possible, according

to Equation 5. Good RC filtering for V

RMS

and narrow

bandwidth (lower than the line frequency) for voltage

loop are suggested for better input current shaping.

The transconductance error amplifier has output

impedance ZO and a capacitor C

EA

(1礔 ~ 10礔)

should be connected to ground. This establishes a

dominant pole f1 for the voltage loop:

EA

O

1

C

Z

2

1

f

?/DIV>

=

?/DIV>

(5)

The average total input power can be expressed as:

AC

EA

2

RMS

EA

AC

RMS

2

RMS

EA

AC

RMS

MO

RMS

(rms)

IN

(rms)

IN

R

V

2

V

R

Vin

V

I

V

I

V

I

V

?/DIV>

=

?/DIV>

=

(6)

From Equation 6, V

EA

, the output of the voltage error

amplifier, controls the total input power and the power

delivered to the load.

Figure 26. Average-Current-Mode Control Loop

Multi-Vector Error Amplifier

Although the PFC stage has a low bandwidth voltage

loop for better input power factor, the innovative multi-

vector error amplifier provides a fast transient response

to clamp the overshoot and undershoot of the PFC

output voltage.

0 shows the block diagram of the multi-vector error

amplifier. When the variation of the feedback voltage

exceeds ?% of the reference voltage, the

transconductance error amplifier adjusts its output

impedance to increase the loop response.

Figure 27. Multi-Vector Error Amplifier

PFC Over-Voltage Protection

Using a voltage divider from the output of PFC to the

OVP pin, the PFC output voltage can be safely

protected. Once the voltage on the OVP pin is over

OVPPFC, the OPFC is disabled. THE OPFC is not

enabled again until the OVP voltage falls below

OVPPFC.

Cycle-by-Cycle Current Limiting

SG6901A provides cycle-by-cycle current limiting for

both PFC and PWM stages. Figure 28 shows the peak

current limit for the PFC stage. The PFC gate drive is

terminated once the voltage on the ISENSE pin goes

below V

PK

.

The voltage of V

RMS

determines the voltage of V

PK

. The

relationship between V

PK

and V

RMS

is shown in Figure 28.

The amplitude of the constant current, I

p

, is determined

by the internal current reference according to:

I

P

R

1.2V

2

I

?/DIV>

=

(8)

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相關代理商/技術參數	參數描述
SG6902	制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Green-Mode PFC / Flyback-PWM Controller
SG6902SZ	功能描述:開關變換器、穩壓器與控制器 Grn Mode PFC/Flyback PWM Controller RoHS:否制造商:Texas Instruments 輸出電壓:1.2 V to 10 V 輸出電流:300 mA 輸出功率: 輸入電壓:3 V to 17 V 開關頻率:1 MHz 工作溫度范圍: 安裝風格:SMD/SMT 封裝 / 箱體:WSON-8 封裝:Reel
SG6903SZ	功能描述:開關變換器、穩壓器與控制器 Highly-Integrated Grn Mode PWM Cntrl RoHS:否制造商:Texas Instruments 輸出電壓:1.2 V to 10 V 輸出電流:300 mA 輸出功率: 輸入電壓:3 V to 17 V 開關頻率:1 MHz 工作溫度范圍: 安裝風格:SMD/SMT 封裝 / 箱體:WSON-8 封裝:Reel
SG6905	制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Green mode PFC/Flyback-PWM Controller
SG6905SY	制造商:Rochester Electronics LLC 功能描述: 制造商:Fairchild Semiconductor Corporation 功能描述:

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型號：	SG6901ASZ
廠商：	Fairchild Semiconductor
文件頁數：	16/19頁
文件大小：	714K
描述：	IC PFC CTLR AVERAGE CURR 20SOIC
標準包裝：	1
模式：	平均電流
頻率 - 開關：	65kHz
電流 - 啟動：	10µA
電源電壓：	12 V ~ 20 V
工作溫度：	-30°C ~ 85°C
安裝類型：	表面貼裝
封裝/外殼：	20-SOIC（0.295"，7.50mm 寬）
供應商設備封裝：	20-SOIC
包裝：	標準包裝
其它名稱：	SG6901ASZDKR

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