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參數資料
| 型號： | TC1306R-BDVUATR |
| 廠商： | Microchip Technology |
| 文件頁數： | 17/36頁 |
| 文件大小： | 0K |
| 描述： | IC REG LDO 1.8V/2.8V/3.8V 8MSOP |
| 標準包裝： | 2,500 |
| 穩壓器拓撲結構： | 正，固定式 |
| 輸出電壓： | 1.8V，2.8V，3.8V |
| 輸入電壓： | 2.7 V ~ 6 V |
| 電壓 - 壓降（標準）： | 0.125V @ 150mA |
| 穩壓器數量： | 2 |
| 電流 - 輸出： | 150mA（最小） |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-TSSOP，8-MSOP（0.118"，3.00mm 寬） |
| 供應商設備封裝： | 8-MSOP |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | TC1306RBDVUATR |
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24 Analog & Interface Product Selector Guide Summer 2012
In
Ter
Fa
ce
:
Infrared
Products
P
ar
t#
o
perating
Voltage
(V)
o
perating
Temp.
r
ange
(°
c
)
m
ax.
Baud
r
ate
(Kbaud)
u
nique
F
eatures
P
ackages
MCP2120
2.5
to
5.5
40
to
+85
325
UART
to
IR
encoder/decoder
with
both
hardware
and
software
baud
rate
selection
14-pin
PDIP,
14-pin
SOIC
MCP2122
1.8
to
5.5
40
to
+85
16×
less
than
clock
input
UART
to
IR
encoder/decoder
8-pin
PDIP,
8-pin
SOIC
MCP2140A
2.0
to
5.5
40
to
+85
9.6
IrDA
Standard
protocol
handler
plus
bit
encoder/decoder,
Fixed
baud
rate,
Low-cost
18-pin
PDIP,
18-pin
SOIC,
20-pin
SSOP
MCP2150
3.0
to
5.5
40
to
+85
115.2
IrDA
Standard
protocol
handler
plus
bit
encoder/decoder
on
one
chip
for
DTE
applications,
Programmable
ID
18-pin
PDIP,
18-pin
SOIC,
20-pin
SSOP
MCP2155
3.0
to
5.5
40
to
+85
115.2
IrDA
Standard
protocol
handler
plus
bit
encoder/decoder
on
one
chip
for
DCE
applications,
Programmable
ID
18-pin
PDIP,
18-pin
SOIC,
20-pin
SSOP
IrD
A
is
a
registered
trademar
kof
Infrared
Data
Association
In
Ter
Fa
ce
:
ether
net
Products
P
ar
t#
o
perating
Voltage
(V)
o
perating
T
emp.
r
ange
(°
c
)
m
ac
P
hy
TX/
r
X
ram
Interface
Features
P
ackages
ENC28J60
3.1
to
3.6
40
to
+85
Ye
s
10Base-T
8
KB
SPI
10Base-T
Ethernet
controller,
IEEE
802.3
compliant
Loopback
test
modes,
Auto-polarity
detection
Clock
out
pin
with
programmable
frequencies
28-pin
SOIC,
28-pin
SSOP,
28-pin
6×6
QFN,
28-pin
SPDIP
ENC424J600
3.0
to
3.6
40
to
+85
Ye
s
10/100Base-T
24
KB
SPI
8-bit
multiplexed
parallel
interface
10/100
Ethernet
controller,
IEEE
802.3(TM)
compliant
Cryptographic
Security
Engines:
MD5,
SHA-1,
AES,
RSA
Preprogrammed
unique
MAC
address
Loopback
test
modes,
Auto-polarity
detection
Clock
out
pin
with
programmable
frequencies
44-pin
TQFP,
44-pin
QFN
ENC624J600
3.0
to
3.6
40
to
+85
Ye
s
10/100Base-T
24
KB
SPI
8-bit
or
16-bit
multiplexed
or
demultiplexed parallel
interface
10/100
Ethernet
controller,
IEEE
802.3(TM)
compliant
Cryptographic
Security
Engines:
MD5,
SHA-1,
AES,
RSA
Preprogrammed
unique
MAC
address
Loopback
test
modes,
Auto-polarity
detection
Clock
out
pin
with
programmable
frequencies
64-pin
TQFP
In
Ter
Fa
ce
:
P
assive
a
ccess
Products
P
ar
t#
o
perating
Voltage
(V)
o
perating
T
emp.
r
ange
(°
c
)
Bus Type
r
F
c
ar
rier
Frequency
d
ata
F
or
mat
Features
P
ackages
MCP2030
1.8
to
3.6
40
to
+85
SPI
125
kHz
NRZ
Three
axis
signal
conditioning
devices
for
passive
access
applications,
High-sensitivity,
Configurable
smart
wake-up
filter
14-pin
PDIP,
14-pin
SOIC,
14-pin
TSSOP
In
Ter
Fa
ce
:
lI
n
T
ransceiver
Products
P
ar
t#
d
escription
V
reg
o
utput
Voltage
(V)
o
perating
T
emp.
r
ange
(°
c
)
V
reg
o
utput
c
ur
rent
(m
a
)
V
cc
r
ange
(V)
m
ax
Baud
r
ate
lI
n
s
pecification
s
uppor
ted
P
ackages
MCP2003A
Stand-alone
LIN
Transceiver
(industry
standard
pinout)
None
40
to
+125
None
6
to
27
(1)
20
Kbaud
Revision
1.3,
2.0,
2.1,
SAE
J2602
8-pin
PDIP,
8-pin
SOIC,
8-pin
4×4
DFN
MCP2004A
Stand-alone
LIN
Transceiver
with
TXE/Fault
I/O
None
40
to
+125
None
6
to
27
(1)
20
Kbaud
Revision
1.3,
2.0,
2.1,
SAE
J2602
8-pin
PDIP,
8-pin
SOIC,
8-pin
4×4
DFN
MCP2021A
LIN
Transceiver
with
integrated
V
reg
5.0
±
3%,
3.3±3%
40
to
+125
70
6
to
18
(1)
20
Kbaud
Revision
1.3,
2.0,
2.1,
SAE
J2602
8-pin
PDIP,
8-pin
SOIC,
8-pin
4×4
DFN
MCP2022A
LIN
Transceiver
with
integrated
V
reg
,
RESET
pin
5.0
±
3%,
3.3±3%
40
to
+125
70
6
to
18
(1)
20
Kbaud
Revision
1.3,
2.0,
2.1,
SAE
J2602
14-pin
PDIP,
14-pin
SOIC,
14-pin
TSSOP
MCP2050
LIN
Transceiver
with
integrated
V
reg
,
WWDT
5.0
±
3%,
3.3±3%
40
to
+125
70
6
to
18
(1)
20
Kbaud
Revision
1.3,
2.0,
2.1,
SAE
J2602
14-pin
PDIP,
14-pin
SOIC,
20-pin
QFN
n
ote
1:
Can
withstand
40V
load
dump.
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