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參數資料
| 型號： | W39L040Q-90J |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | PROM |
| 英文描述： | 512 K X 8 CMOS FLASH MEMORY |
| 中文描述： | 512K X 8 FLASH 3.3V PROM, 90 ns, PDSO32 |
| 封裝： | 8 X 14 MM, STSOP-32 |
| 文件頁數： | 3/27頁 |
| 文件大小： | 334K |
| 代理商： | W39L040Q-90J |
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W39L040
Publication Release Date: February 10, 2003
- 3 -
Revision A3
6. FUNCTIONAL DESCRIPTION
Device Bus Operation
Read Mode
The read operation of the W39L040 is controlled by #CE and #OE, both of which have to be low for
the host to obtain data from the outputs. #CE is used for device selection. When #CE is high, the chip
is de-selected and only standby power will be consumed. #OE is the output control and is used to
gate data from the output pins. The data bus is in high impedance state when either #CE or #OE is
high. Refer to the timing waveforms for further details.
Write Mode
Device erasure and programming are accomplished via the command register. The contents of the
register serve as inputs to the internal state machine. The state machine outputs dictate the function
of the device.
The command register itself does not occupy any addressable memory location. The register is a
latch used to store the commands, along with the address and data information needed to execute the
command. The command register is written by bringing #WE to logic low state, while #CE is at logic
low state and #OE is at logic high state. Addresses are latched on the falling edge of #WE or #CE,
whichever happens later; while data is latched on the rising edge of #WE or #CE, whichever happens
first. Standard microprocessor write timings are used.
Refer to AC Write Characteristics and the Erase/Programming Waveforms for specific timing
parameters.
Standby Mode
There are two ways to implement the standby mode on the W39L040 device, both using the #CE pin.
A CMOS standby mode is achieved with the
#CE
input held at
V
DD
±
0.3V. Under this condition the current
is typically reduced to less than 15
μ
A (max). A TTL standby mode is achieved with the #CE pin held
at V
IH
.
Under this condition the current is typically reduced to 2 mA(max).
In the standby mode the outputs are in the high impedance state, independent of the #OE input.
Output Disable Mode
With the #OE input at a logic high level (V
IH
), output from the device is disabled. This will cause the
output pins to be in a high impedance state.
Auto-select Mode
The auto-select mode allows the reading of a binary code from the device and will identify its
manufacturer and type. This mode is intended for use by programming equipment for the purpose of
automatically matching the device to be programmed with its corresponding programming algorithm.
This mode is functional over the entire temperature range of the device.
To activate this mode, the programming equipment must force V
ID
(11.5V to 12.5V) on address pin
A9. Two identifier bytes may then be sequenced from the device outputs by toggling address A0 from
V
IL
to V
IH
. All addresses are don
′
t cares except A0 and A1 (see "Auto-select Codes").
相關PDF資料 |
PDF描述 |
|---|---|
| W39L040Q-90K | 512 K X 8 CMOS FLASH MEMORY |
| W39L040T-70 | 512 K X 8 CMOS FLASH MEMORY |
| W39L040T-70B | 512 K X 8 CMOS FLASH MEMORY |
| W39L040T-70J | 512 K X 8 CMOS FLASH MEMORY |
| W39L040T-70K | 512 K X 8 CMOS FLASH MEMORY |
相關代理商/技術參數 |
參數描述 |
|---|---|
| W39L040Q-90K | 制造商:WINBOND 制造商全稱:Winbond 功能描述:512 K X 8 CMOS FLASH MEMORY |
| W39L040T-70 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:512 K X 8 CMOS FLASH MEMORY |
| W39L040T-70B | 制造商:WINBOND 制造商全稱:Winbond 功能描述:512 K X 8 CMOS FLASH MEMORY |
| W39L040T-70J | 制造商:WINBOND 制造商全稱:Winbond 功能描述:512 K X 8 CMOS FLASH MEMORY |
| W39L040T-70K | 制造商:WINBOND 制造商全稱:Winbond 功能描述:512 K X 8 CMOS FLASH MEMORY |
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