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參數資料
| 型號： | W39V040CQZ |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | PROM |
| 英文描述： | 512K 】 8 CMOS FLASH MEMORY WITH LPC INTERFACE |
| 中文描述： | 512K X 8 FLASH 3.3V PROM, 11 ns, PDSO32 |
| 封裝： | LEAD FREE, STSOP-32 |
| 文件頁數： | 9/36頁 |
| 文件大小： | 279K |
| 代理商： | W39V040CQZ |
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W39V040C
Publication Release Date: Apr. 11, 2006
- 9 -
Revision A1
6.10 DQ7: #Data Polling
The #Data Polling bit, DQ7, indicates whether an Embedded Program or Erase algorithm is in progress
or completed. Data Polling is valid after the rising edge of the final #WE pulse in the command
sequence.
During the Embedded Program algorithm, the device outputs on DQ7 and the complement of the data
programmed to DQ7. Once the Embedded Program algorithm has completed, the device outputs the
data programmed to DQ7. The system must provide the program address to read valid status
information on DQ7. If a program address falls within a protected sector, #Data Polling on DQ7 is active
for about 1
μ
S, and then the device returns to the read mode.
During the Embedded Erase algorithm, #Data Polling produces “0” on DQ7. Once the Embedded
Erase algorithm has completed, #Data Polling produces “1” on DQ7. An address within any of the
sectors selected for erasure must be provided to read valid status information on DQ7.
Just before the completion of an Embedded Program or Erase operation, DQ7 may change
asynchronously with DQ0-DQ6 while Output Enable (#OE) is set to low. That is, the device may
change from providing status information to valid data on DQ7. Depending on when it samples the DQ7
output, the system may read the status or valid data. Even if the device has completed the program or
erase operation and DQ7 has valid data, the data outputs on DQ0-DQ6 may be still invalid. Valid data
on DQ7-DQ0 will appear on successive read cycles.
6.11 RY/#BY: Ready/#Busy
The
RY/#BY
is a dedicated, open-drain output pin which indicates whether an Embedded Algorithm is in
progress or complete. The
RY/#BY
status is valid after the rising edge of the final
#WE
pulse in the command
sequence. Since
RY/#BY
is an open-drain output, several
RY/#BY
pins can be tied together in parallel with a
pull-up resistor to V
DD
.
When the output is low (Busy), the device is actively erasing or programming. When the output is high
(Ready), the device is in the read mode or standby mode.
6.12 DQ6: Toggle Bit
Toggle Bit on DQ6 indicates whether an Embedded Program or Erase algorithm is in progress or
complete. Toggle Bit I may be read at any address, and is valid after the rising edge of the final #WE
pulse in the command sequence (before the program or erase operation), and during the sector erase
time-out.
During an Embedded Program or Erase algorithm operation, successive read cycles to any address
cause DQ6 to toggle. The system may use either #OE to control the read cycles. Once the operation
has completed, DQ6 stops toggling.
The system can use DQ6 to determine whether a sector is actively erasing. If the device is actively
erasing (i.e., the Embedded Erase algorithm is in progress), DQ6 toggles. If a program address falls
within a protected sector, DQ6 toggles for about 1
μ
s after the program command sequence is written,
and then returns to reading array data.
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相關代理商/技術參數 |
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|---|---|
| W39V040FA | 制造商:WINBOND 制造商全稱:Winbond 功能描述:512K X 8 CMOS FLASH MEMORY WITH FWH INERFACE |
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| W39V040FAPZ | 功能描述:IC FLASH 4MBIT 11NS 32PLCC RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:- 標準包裝:1,000 系列:- 格式 - 存儲器:RAM 存儲器類型:移動 SDRAM 存儲容量:256M（8Mx32） 速度:133MHz 接口:并聯 電源電壓:1.7 V ~ 1.95 V 工作溫度:-40°C ~ 85°C 封裝/外殼:90-VFBGA 供應商設備封裝:90-VFBGA（8x13） 包裝:帶卷 (TR) 其它名稱:557-1327-2 |
| W39V040FAQ | 制造商:WINBOND 制造商全稱:Winbond 功能描述:512K X 8 CMOS FLASH MEMORY WITH FWH INERFACE |
| W39V040FAT | 制造商:WINBOND 制造商全稱:Winbond 功能描述:512K X 8 CMOS FLASH MEMORY WITH FWH INERFACE |
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