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參數(shù)資料
| 型號(hào)： | W78C801-40 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT MICROCONTROLLER |
| 中文描述： | 8-BIT, MROM, 40 MHz, MICROCONTROLLER, PDIP40 |
| 封裝： | DIP-40 |
| 文件頁數(shù)： | 14/18頁 |
| 文件大小： | 248K |
| 代理商： | W78C801-40 |
W78C801
- 14 -
Data Read Cycle
PARAMETER
SYMBOL
T
DAR
MIN.
3 T
CP
-
-
TYP.
-
MAX.
3 T
CP
+
4 T
CP
UNIT
nS
NOTES
1, 2
ALE Low to RD Low
RD Low to Data Valid
T
DDA
-
nS
1
Data Hold from RD High
T
DDH
0
-
2 T
CP
nS
Data Float from RD High
T
DDZ
0
-
2 T
CP
nS
RD Pulse Width
T
DRD
6 T
CP
-
6 T
CP
-
nS
2
Notes:
1. Data memory access time is 8 T
CP
.
2. "
" (due to buffer driving delay and wire loading) is 20 nS.
Data Write Cycle
PARAMETER
SYMBOL
T
DAW
MIN.
3 T
CP
-
1 T
CP
-
1 T
CP
-
6 T
CP
-
TYP.
-
MAX.
3 T
CP
+
-
UNIT
nS
ALE Low to WR Low
Data Valid to WR Low
T
DAD
-
nS
Data Hold from WR High
T
DWD
-
-
nS
WR Pulse Width
T
DWR
6 T
CP
-
nS
Note: "
" (due to buffer driving delay and wire loading) is 20 nS.
Port Access Cycle
PARAMETER
SYMBOL
T
PDS
T
PDH
T
PDA
MIN.
1 T
CP
0
1 T
CP
TYP.
-
-
-
MAX.
-
-
-
UNIT
nS
nS
nS
Port Input Setup to ALE Low
Port Input Hold from ALE Low
Port Output to ALE
Note: Ports are read during S5P2, and output data becomes available at the end of S6P2. The timing data are referenced to
ALE, since it provides a convenient reference.
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相關(guān)代理商/技術(shù)參數(shù) |
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| W78C801F-24 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:8-BIT MICROCONTROLLER |
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