
Preliminary W78LE52
Publication Release Date: January 1999
- 13 -
Revision A1
DC Characteristics, continued
PARAMETER
SYM.
PECIFICATION
MIN.
-10
UNIT
TEST CONDITIONS
MAX.
+10
Input Leakage Current
P0,
EA
Logic 1 to 0 Transition Current
P1, P2, P3, P4
Input Low Voltage
P0, P1, P2, P3, P4,
EA
Input Low Voltage
RST[*1]
Input Low Voltage
XTAL1 [*3]
Input High Voltage
P0, P1, P2, P3, P4,
EA
Input High Voltage
RST[*1]
Input High Voltage
XTAL1 [*3]
Output Low Voltage
P1, P2, P3, P4
Output Low Voltage
P0, ALE, PSEN [*2]
Sink Current
P1, P2, P3, P4
Sink Current
P0, ALE, PSEN
Output High Voltage
P1, P2, P3, P4
Output High Voltage
I
LK
μ
A
V
DD
= 5.5V
0V < V
IN
< V
DD
V
DD
= 5.5V
V
IN
= 2.0V
V
DD
= 4.5V
V
DD
= 2.4V
V
DD
= 4.5V
V
DD
= 2.4V
V
DD
= 4.5V
V
DD
= 2.4V
V
DD
= 5.5V
V
DD
= 2.4V
V
DD
= 5.5V
V
DD
= 2.4V
V
DD
= 5.5V
V
DD
= 2.4V
V
DD
= 4.5V, I
OL
= +2 mA
V
DD
= 2.4V, I
OL
= +1 mA
V
DD
= 4.5V, I
OL
= +4 mA
V
DD
= 2.4V, I
OL
= +2 mA
I
TL
[*4]
-500
-
μ
A
V
IL1
0
0
0
0
0
0
0.8
0.5
0.8
0.3
0.8
0.6
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
IL2
V
IL3
V
IH1
2.4
1.4
3.5
1.7
3.5
1.6
-
-
-
-
V
DD
+0.2
V
DD
+0.2
V
DD
+0.2
V
DD
+0.2
V
DD
+0.2
V
DD
+0.2
0.45
0.25
0.45
0.25
V
IH2
V
IH3
V
OL1
V
OL2
I
SK1
4
12
5.4
16
9
mA
mA
mA
mA
V
DD
= 4.5V, Vin = 0.45V
V
DD
= 2.4V, Vin = 0.45V
V
DD
= 4.5V, Vin = 0.45V
V
DD
= 2.4V, Vin = 0.45V
1.8
8
4.0
I
SK2
V
OH1
2.4
1.4
2.4
1.4
-
-
-
-
V
V
V
V
V
DD
= 4.5V, I
OH
= -100
μ
A
V
DD
= 2.4V, I
OH
= -8
μ
A
V
DD
= 4.5V, I
OH
= -400
μ
A
V
DD
= 2.4V, I
OH
= -200
μ
A
V
DD
= 4.5V, Vin = 2.4V
V
DD
= 2.4V, Vin = 1.4V
V
DD
= 4.5V, Vin = 2.4V
V
DD
= 2.4V, Vin = 1.4V
V
OH2
P0, ALE, PSEN [*2]
Source Current
P1, P2, P3, P4
Source Current
P0, ALE, PSEN
I
SR1
-100
-10
-8
-1.0
-250
-30
-14
-2.4
μ
A
μ
A
mA
mA
I
SR2
Notes:
*1. RST pin is a Schmitt trigger input.
*2. P0, ALE and /PSEN are tested in the external access mode.
*3. XTAL1 is a CMOS input.
*4. Pins of P1, P2, P3, P4 can source a transition current when they are being externally driven from 1 to 0.