
Preliminary W91510DN SERIES
Publication Release Date: May 1997
- 3 -
Revision A2
PIN DESCRIPTION
SYMBOL
PIN NO.
I/O
FUNCTION
Row,
Column
Inputs
18
21,
13
17
I
The keyboard inputs may be used with either the standard 5
×
6
keyboard, an inexpensive single contact (form A) keyboard or
electronic input.
A valid key entry is defined by a single row being connected to
a single column.
XT1,
XT1
22, 23
I, O
A built-in inverter provides oscillation with an inexpensive
3.579545 MHz crystal or ceramic resonater.
The oscillator ceases when a keypad input is not sensed after
chip enable and dialing finished. The crystal frequency
deviation is
±
0.02%.
T/P MUTE
8
O
The T/P
MUTE
is a conventional CMOS N-channel open drain
output.
The output transistor is switched on low level during dialing
sequence (both pulse and tone mode), one-key redial break
and flash break. Otherwise, it is switched off.
H/P MUTE
9
( W91510DNF,
W91512DNF,
only )
O
The H/P MUTE is a conventional CMOS inverter output, During
pulse dialing, one-key redial break, flash break and hold
functions, this pin will output an active high.
It remains in a low state at all other times.
LOCK
9
(W91511DLNF,
W91513DLNF
only)
I
The LOCK pin is used to prevent "0" or "9" dialing under PABX
system long distance call control. When the first key input after
reset is "0" or "9", all the key inputs, including "0" or "9" key,
become invalid, and the chip generates no output.
The telephone is reinitialized by a reset.
The following table describes the functions of the LOCK pin:
LOCK PIN
Floating
V
DD
SS
V
FUNCTION
Normal dialing
"0", "9" dialing inhibited
"0" dialing inhibited
HKS
24
I
Hook switch input.
HKS = V
DD
or floating: On-hook state. Chip in sleeping mode,
no operation.
HKS = V
SS
: Off-hook state. Chip enable for normal operation.
HKS pin is pulled to V
DD
by internal resistor.