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| 型號(hào)： | ATA8743-PXQW |
| 廠商： | Atmel |
| 文件頁(yè)數(shù)： | 24/238頁(yè) |
| 文件大?。?/td> | 3971K |
| 描述： | MCU W/TRANSMITTER ASK/FSK 24QFN |
| 產(chǎn)品培訓(xùn)模塊： | MCU Product Line Introduction |
| 標(biāo)準(zhǔn)包裝： | 6,000 |
| 頻率： | 868MHz ~ 928MHz |
| 應(yīng)用： | 家庭自動(dòng)化，遙感，RKE |
| 調(diào)制或協(xié)議： | ASK，F(xiàn)SK |
| 數(shù)據(jù)傳輸率 - 最大： | 32 kBit/s |
| 功率 - 輸出： | 3.5dBm ~ 8dBm |
| 電流 - 傳輸： | 9.3mA |
| 數(shù)據(jù)接口： | PCB，表面貼裝 |
| 天線(xiàn)連接器： | PCB，表面貼裝 |
| 存儲(chǔ)容量： | 4kB 閃存，256B EEPROM，256B SRAM |
| 電源電壓： | 1.8 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 24-VQFN 裸露焊盤(pán) |
| 包裝： | 帶卷 (TR) |
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24
9152BINDCO02/10
ATA8743
The fast-access Register File contains 32 x 8-bit general purpose working registers with a single
clock cycle access time. This allows single-cycle Arithmetic Logic Unit (ALU) operation. In a typ-
ical ALU operation, two operands are output from the Register File, the operation is executed,
and the result is stored back in the Register File in one clock cycle.
Six of the 32 registers can be used as three 16-bit indirect address register pointers for Data
Space addressing enabling efficient address calculations. One of the these address pointers
can also be used as an address pointer for look up tables in Flash Program memory. These
added function registers are the 16-bit X-, Y-, and Z-register, described later in this section.
The ALU supports arithmetic and logic operations between registers or between a constant and
a register. Single register operations can also be executed in the ALU. After an arithmetic opera-
tion, the Status Register is updated to reflect information about the result of the operation.
Program flow is provided by conditional and unconditional jump and call instructions, able to
directly address the whole address space. Most AVR instructions have a single 16-bit word for-
mat. Every Program memory address contains a 16- or 32-bit instruction.
During interrupts and subroutine calls, the return address Program Counter (PC) is stored on the
Stack. The Stack is effectively allocated in the general data SRAM, and consequently the Stack
size is only limited by the total SRAM size and the usage of the SRAM. All user programs must
initialize the SP in the Reset routine (before subroutines or interrupts are executed). The Stack
Pointer (SP) is read/write accessible in the I/O space. The data SRAM can easily be accessed
through the five different addressing modes supported in the AVR architecture.
The memory spaces in the AVR architecture are all linear and regular memory maps.
A flexible interrupt module has its control registers in the I/O space with an additional Global
Interrupt Enable bit in the Status Register. All interrupts have a separate Interrupt Vector in the
Interrupt Vector table. The interrupts have priority in accordance with their Interrupt Vector posi-
tion. The lower the Interrupt Vector address, the higher the priority.
The I/O memory space contains 64 addresses for CPU peripheral functions as Control Regis-
ters, SPI, and other I/O functions. The I/O memory can be accessed directly, or as the Data
Space locations following those of the Register File, 0x20 - 0x5F.
12.3 ALU Arithmetic Logic Unit
The high-performance AVR ALU operates in direct connection with all the 32 general purpose
working registers. Within a single clock cycle, arithmetic operations between general purpose
registers or between a register and an immediate are executed. The ALU operations are divided
into three main categories arithmetic, logical, and bit-functions. Some implementations of the
architecture also provide a powerful multiplier supporting both signed/unsigned multiplication
and fractional format. See the Instruction Set section for a detailed description.
12.4 Status Register
The Status Register contains information about the result of the most recently executed arithme-
tic instruction. This information can be used for altering program flow in order to perform
conditional operations. Note that the Status Register is updated after all ALU operations, as
specified in the Instruction Set Reference. This will in many cases remove the need for using the
dedicated compare instructions, resulting in faster and more compact code.
The Status Register is not automatically stored when entering an interrupt routine and restored
when returning from an interrupt. This must be handled by software.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| ATAB5275 | 功能描述:射頻開(kāi)發(fā)工具 LF Tx Antenna driver board (TPMS) RoHS:否 制造商:Taiyo Yuden 產(chǎn)品:Wireless Modules 類(lèi)型:Wireless Audio 工具用于評(píng)估:WYSAAVDX7 頻率: 工作電源電壓:3.4 V to 5.5 V |
| ATAB5276 | 功能描述:射頻開(kāi)發(fā)工具 1A Antenna Driver Demoboard RoHS:否 制造商:Taiyo Yuden 產(chǎn)品:Wireless Modules 類(lèi)型:Wireless Audio 工具用于評(píng)估:WYSAAVDX7 頻率: 工作電源電壓:3.4 V to 5.5 V |
| ATAB5278 | 功能描述:射頻開(kāi)發(fā)工具 LF Tx Antenna driver board (PEG) RoHS:否 制造商:Taiyo Yuden 產(chǎn)品:Wireless Modules 類(lèi)型:Wireless Audio 工具用于評(píng)估:WYSAAVDX7 頻率: 工作電源電壓:3.4 V to 5.5 V |
| ATAB5279 | 功能描述:射頻開(kāi)發(fā)工具 LF Transmitter with ATA5279 RoHS:否 制造商:Taiyo Yuden 產(chǎn)品:Wireless Modules 類(lèi)型:Wireless Audio 工具用于評(píng)估:WYSAAVDX7 頻率: 工作電源電壓:3.4 V to 5.5 V |
| ATAB5282 | 功能描述:BOARD EVAL LF 125KHZ ANT DVR 3CH RoHS:是 類(lèi)別:RF/IF 和 RFID >> RFID 評(píng)估和開(kāi)發(fā)套件及電路板 系列:Smart RF 產(chǎn)品培訓(xùn)模塊:M24LR64 Dual Interface EEPROM 標(biāo)準(zhǔn)包裝:1 系列:- 類(lèi)型:讀取器模塊 頻率:13.56MHz 適用于相關(guān)產(chǎn)品:M24LR-64-R 已供物品:2 根基準(zhǔn)天線(xiàn)，I2C 和 RFID 讀取器，樣品 其它名稱(chēng):497-10480 |
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