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參數(shù)資料
| 型號： | ATF1502BE-7AU44 |
| 廠商： | Atmel |
| 文件頁數(shù)： | 21/24頁 |
| 文件大小： | 0K |
| 描述： | IC CPLD EE HP 7NS 44TQFP |
| 標(biāo)準(zhǔn)包裝： | 160 |
| 系列： | ATF15xx |
| 可編程類型： | 系統(tǒng)內(nèi)可編程（最少 10,000 次編程/擦除循環(huán)） |
| 最大延遲時間 tpd(1)： | 7.5ns |
| 電壓電源 - 內(nèi)部： | 1.7 V ~ 1.9 V |
| 宏單元數(shù)： | 32 |
| 輸入/輸出數(shù)： | 32 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 44-TQFP |
| 供應(yīng)商設(shè)備封裝： | 44-TQFP（10x10） |
| 包裝： | 托盤 |
| 配用： | ATF15XX-DK3-ND - KIT DEV FOR ATF15XX CPLD'S |
6
3492A–PLD–12/05
ATF1502BE
2.
Programmable Pin-keeper Option for Inputs and I/Os
The ATF1502BE offers the option of programming each of its input or I/O pin so that pin-keeper
circuit can be utilized. When any pin is driven high or low and then subsequently left floating, it
will stay at that previous high or low level. This circuitry prevents unused input and I/O lines from
floating to intermediate voltage levels, which causes unnecessary power consumption and sys-
tem noise. The keeper circuits eliminate the need for external pull-up resistors and eliminate
their DC power consumption.
Figure 2-1 shows the pin-keeper circuit for an Input Pin and Figure 2-2 shows the same for an
I/O pin. The pin-keeper circuit is a weak feedback latch and has an effective resistance that is
approximately 50 k
.
Figure 2-1.
Input with Programmable Pin-keeper
Figure 2-2.
I/O with Programmable Pin-keeper
50K
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