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參數資料

型號：	EPF10K40RC240-4
廠商：	Altera
文件頁數：	107/128頁
文件大小：	0K
描述：	IC FLEX 10K FPGA 40K 240-RQFP
產品培訓模塊：	Three Reasons to Use FPGA's in Industrial Designs
產品變化通告：	Package Change 30/Jun/2010
標準包裝：	24
系列：	FLEX-10K®
LAB/CLB數：	288
邏輯元件/單元數：	2304
RAM 位總計：	16384
輸入/輸出數：	189
門數：	93000
電源電壓：	4.75 V ~ 5.25 V
安裝類型：	表面貼裝
工作溫度：	0°C ~ 85°C
封裝/外殼：	240-BFQFP 裸露焊盤
供應商設備封裝：	240-RQFP（32x32）
產品目錄頁面：	603 (CN2011-ZH PDF)
其它名稱：	544-2237

Altera Corporation

FLEX 10K Embedded Programmable Logic Device Family Data Sheet

The logic array consists of logic array blocks (LABs). Each LAB contains

eight LEs and a local interconnect. An LE consists of a 4-input look-up

table (LUT), a programmable flipflop, and dedicated signal paths for carry

and cascade functions. The eight LEs can be used to create medium-sized

blocks of logic—8-bit counters, address decoders, or state machines—or

combined across LABs to create larger logic blocks. Each LAB represents

about 96 usable gates of logic.

Signal interconnections within FLEX 10K devices and to and from device

pins are provided by the FastTrack Interconnect, a series of fast,

continuous row and column channels that run the entire length and width

of the device.

Each I/O pin is fed by an I/O element (IOE) located at the end of each row

and column of the FastTrack Interconnect. Each IOE contains a

bidirectional I/O buffer and a flipflop that can be used as either an output

or input register to feed input, output, or bidirectional signals. When used

with a dedicated clock pin, these registers provide exceptional

performance. As inputs, they provide setup times as low as 1.6 ns and

hold times of 0 ns; as outputs, these registers provide clock-to-output

times as low as 5.3 ns. IOEs provide a variety of features, such as JTAG

BST support, slew-rate control, tri-state buffers, and open-drain outputs.

Figure 1 shows a block diagram of the FLEX 10K architecture. Each group

of LEs is combined into an LAB; LABs are arranged into rows and

columns. Each row also contains a single EAB. The LABs and EABs are

interconnected by the FastTrack Interconnect. IOEs are located at the end

of each row and column of the FastTrack Interconnect.

相關代理商/技術參數	參數描述
EPF10K40RC240-4N	功能描述:FPGA - 現場可編程門陣列 FPGA - Flex 10K 288 LABs 189 IOs RoHS:否制造商:Altera Corporation 系列:Cyclone V E 柵極數量: 邏輯塊數量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EPF10K50	制造商:ALTERA 制造商全稱:Altera Corporation 功能描述:1. Enhanced Configuration Devices (EPC4, EPC8, and EPC16) Data Sheet
EPF10K50BC3563	制造商:ALTERA 功能描述:*
EPF10K50BC356-3	功能描述:FPGA - 現場可編程門陣列 FPGA - Flex 10K 360 LABs 274 IOs RoHS:否制造商:Altera Corporation 系列:Cyclone V E 柵極數量: 邏輯塊數量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EPF10K50BC3564	制造商:ALTERA 功能描述:*

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