- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄22136 > LA4032ZC-75TN48E (Lattice Semiconductor Corporation)IC CPLD 32MACROCELLS 48TQFP PDF資料下載
參數(shù)資料
| 型號(hào)： | LA4032ZC-75TN48E |
| 廠商： | Lattice Semiconductor Corporation |
| 文件頁數(shù)： | 41/42頁 |
| 文件大小： | 0K |
| 描述： | IC CPLD 32MACROCELLS 48TQFP |
| 標(biāo)準(zhǔn)包裝： | 250 |
| 系列： | LA-ispMACH |
| 可編程類型： | 系統(tǒng)內(nèi)可編程 |
| 最大延遲時(shí)間 tpd(1)： | 7.5ns |
| 電壓電源 - 內(nèi)部： | 1.7 V ~ 1.9 V |
| 宏單元數(shù)： | 32 |
| 輸入/輸出數(shù)： | 32 |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-TQFP |
| 供應(yīng)商設(shè)備封裝： | 48-TQFP（7x7） |
| 包裝： | 托盤 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁當(dāng)前第41頁第42頁
Lattice Semiconductor
LA-ispMACH 4000V/Z Automotive Family Data Sheet
8
Output Routing Pool (ORP)
The Output Routing Pool allows macrocell outputs to be connected to any of several I/O cells within an I/O block.
This provides greater exibility in determining the pinout and allows design changes to occur without affecting the
pinout. The output routing pool also provides a parallel capability for routing macrocell-level OE product terms. This
allows the OE product term to follow the macrocell output as it is switched between I/O cells. Additionally, the out-
put routing pool allows the macrocell output or true and complement forms of the 5-PT bypass signal to bypass the
output routing multiplexers and feed the I/O cell directly. The enhanced ORP of the LA-ispMACH 4000V/Z family
consists of the following elements:
Output Routing Multiplexers
OE Routing Multiplexers
Output Routing Pool Bypass Multiplexers
Figure 7 shows the structure of the ORP from the I/O cell perspective. This is referred to as an ORP slice. Each
ORP has as many ORP slices as there are I/O cells in the corresponding I/O block.
Figure 7. ORP Slice
Output Routing Multiplexers
The details of connections between the macrocells and the I/O cells vary across devices and within a device
dependent on the maximum number of I/Os available. Tables 6-10 provide the connection details.
Table 6. ORP Combinations for I/O Blocks with 8 I/Os
I/O Cell
Available Macrocells
I/O 0
M0, M1, M2, M3, M4, M5, M6, M7
I/O 1
M2, M3, M4, M5, M6, M7, M8, M9
I/O 2
M4, M5, M6, M7, M8, M9, M10, M11
I/O 3
M6, M7, M8, M9, M10, M11, M12, M13
I/O 4
M8, M9, M10, M11, M12, M13, M14, M15
I/O 5
M10, M11, M12, M13, M14, M15, M0, M1
I/O 6
M12, M13, M14, M15, M0, M1, M2, M3
I/O 7
M14, M15, M0, M1, M2, M3, M4, M5
Output Routing Multiplexer
OE Routing Multiplexer
ORP
Bypass
Multiplexer
From Macrocell
From PTOE
To I/O
Cell
To I/O
Cell
Output
OE
5-PT Fast Path
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| VI-BWV-CY-F1 | CONVERTER MOD DC/DC 5.8V 50W |
| R2S12-2412/H | CONV DC/DC 2W 24VIN 12VOUT SMD |
| VI-BWT-CY-F4 | CONVERTER MOD DC/DC 6.5V 50W |
| VI-BWT-CY-F3 | CONVERTER MOD DC/DC 6.5V 50W |
| VI-BWT-CY-F1 | CONVERTER MOD DC/DC 6.5V 50W |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LA4032ZC75TN48E-ACJ | 制造商:Lattice Semiconductor 功能描述:CUSTOM DEVICE FOR CONTINENTAL AUTOMOTIVE |
| LA4032ZV-75TN100E | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:3.3V/1.8V In-System Programmable SuperFAST High Density PLDs |
| LA4032ZV-75TN128E | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:3.3V/1.8V In-System Programmable SuperFAST High Density PLDs |
| LA4032ZV-75TN144E | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:3.3V/1.8V In-System Programmable SuperFAST High Density PLDs |
| LA4032ZV-75TN44E | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:3.3V/1.8V In-System Programmable SuperFAST High Density PLDs |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。