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參數資料
| 型號： | LMC6684BIM |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 運算放大器 |
| 英文描述： | Low Voltage, Rail-To-Rail Input and Output CMOS |
| 中文描述： | QUAD OP-AMP, 3000 uV OFFSET-MAX, 1.2 MHz BAND WIDTH, PDSO16 |
| 封裝： | SOP-16 |
| 文件頁數： | 15/24頁 |
| 文件大小： | 750K |
| 代理商： | LMC6684BIM |
4.0 Capacitive Load Tolerance
(Continued)
The pulse response of the circuit shown in Figure 9 is shown in Figure 10
Application Hints
5.0 Printed-Circuit-Board Layout for High-Impedance Work
It is generally recognized that any circuit which must operate
with less than 1000 pA of leakage current requires special
layout of the PC board. When one wishes to take advantage
of the ultra-low input current of the LMC6681/2/4, typically
less than 80 fA, it is essential to have an excellent layout.
Fortunately, the techniques of obtaining low leakages are
quite simple. First, the user must not ignore the surface leak-
age of the PC board, even though it may sometimes appear
acceptably low, because under conditions of high humidity or
dust or contamination, the surface leakage will be appre-
ciable.
To minimize the effect of any surface leakage, lay out a ring
of foil completely surrounding the LMC6681/2/4’s inputs and
the terminals of capacitors, diodes, conductors, resistors, re-
lay terminals, etc. connected to the op-amp’s inputs, as in
Figure 11 To have a significant effect, guard rings should be
placed in both the top and bottom of the PC board. This PC
foil must then be connected to a voltage which is at the same
voltage as the amplifier inputs, since no leakage current can
flow between two points at the same potential. For example,
a PC board trace-to-pad resistance of 10
, which is nor-
mally considered a very large resistance, could leak 5 pA if
the trace were a 5V bus adjacent to the pad of the input. This
would cause a 60 times degradation from the LMC6681/2/
4’s actual performance. However, if a guard ring is held
within 5 mV of the inputs, then even a resistance of 10
11
would cause only 0.05 pA of leakage current. See Figure 12
for typical connections of guard rings for standard op-amp
configurations.
DS012042-14
FIGURE 10. Pulse Response of the
LMC6682 Circuit Shown in
Figure 9
DS012042-18
FIGURE 11. Example of Guard Ring in PC Board
Layout
www.national.com
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