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參數(shù)資料
| 型號(hào)： | MC88915FN55PLCC |
| 廠商： | Motorola, Inc. |
| 英文描述： | Low Skew CMOS PLL Clock Driver |
| 中文描述： | 低偏移的CMOS PLL時(shí)鐘驅(qū)動(dòng)器 |
| 文件頁(yè)數(shù)： | 6/20頁(yè) |
| 文件大小： | 216K |
| 代理商： | MC88915FN55PLCC |
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MC88915TFN55/70/100/133/160
MOTOROLA
TIMING SOLUTIONS
BR1333 — Rev 6
6
MC88915TFN100
SYNC INPUT TIMING REQUIREMENTS
Symbol
Parameter
Minimum
Maximum
Unit
tRISE/FALL,SYNC Inputs
Rise/Fall Time, SYNC Inputs From 0.8 to 2.0V
—
3.0
ns
tCYCLE, SYNC Inputs
Input Clock Period SYNC Inputs
20.0
1
200
2
ns
Duty Cycle SYNC Inputs
Input Duty Cycle SYNC Inputs
50%
±
25%
1. These tCYCLE minimum values are valid when ‘Q’ output is fed back and connected to the FEEDBACK pin. This is the configuration shown
in Figure 5b.
2. Information in Table 1 and in Note 3 of the AC specification notes describe this specification and its limits depending on what output is fed back,
and if FREQ_SEL is high or low.
DC ELECTRICAL CHARACTERISTICS
(Voltages Referenced to GND) TA =–40
°
C to +85
°
C, VCC = 5.0 V
±
5%
Symbol
Parameter
Test Conditions
VCC
V
Target Limit
Unit
VIH
Minimum High–Level Input
Voltage
Vout = 0.1 V or VCC – 0.1 V
4.75
5.25
2.0
2.0
V
VIL
Maximum Low–Level Input
Voltage
Vout = 0.1 V or VCC – 0.1 V
4.75
5.25
0.8
0.8
V
VOH
Minimum High–Level Output
Voltage
Vin = VIH or VIL
IOH = –36 mA
1
Vin = VIH or VIL
IOL = 36 mA
1
VI = VCC or GND
VI = VCC – 2.1 V
VOLD = 1.0V Max
VOHD = 3.85V Min
VI = VCC or GND
4.75
5.25
4.01
4.51
V
VOL
Maximum Low–Level Output
Voltage
4.75
5.25
0.44
0.44
V
Iin
Maximum Input Leakage Current
5.25
±
1.0
2.0
2
88
μ
A
ICCT
IOLD
IOHD
ICC
Maximum ICC/Input
Minimum Dynamic Output Current
3
5.25
mA
5.25
mA
5.25
–88
mA
Maximum Quiescent Supply
Current (per Package)
5.25
1.0
mA
IOZ
Maximum 3–State Leakage Current
VI = VIH or VIL;VO = VCC or GND
5.25
±
50
4
μ
A
1. IOL and IOH are 12mA and –12mA respectively for the LOCK output.
2. The PLL_EN input pin is not guaranteed to meet this specification.
3. Maximum test duration is 2.0ms, one output loaded at a time.
4. Specification value for IOZ is preliminary, will be finalized upon ‘MC’ status.
CAPACITANCE AND POWER SPECIFICATIONS
Symbol
Parameter
Typical Values
Unit
Conditions
CIN
CPD
PD1
Input Capacitance
4.5
pF
VCC = 5.0 V
VCC = 5.0 V
VCC = 5.0 V
T = 25
°
C
Power Dissipation Capacitance
40
pF
Power Dissipation @ 50MHz with 50
Thevenin Termination
23mW/Output
184mW/Device
mW
PD2
Power Dissipation @ 50MHz with 50
Parallel Termination to GND
57mW/Output
456mW/Device
mW
VCC = 5.0 V
T = 25
°
C
NOTE: PD1 and PD2 mW/Output numbers are for a ‘Q’ output.
FREQUENCY SPECIFICATIONS
(TA =–40
°
C to +85
°
C, VCC = 5.0 V
±
5%)
Guaranteed Minimum
Symbol
fmax
1
Parameter
TFN100
Unit
Maximum Operating Frequency (2X_Q Output)
100
MHz
Maximum Operating Frequency (Q0–Q4,Q5 Output)
50
MHz
1. Maximum Operating Frequency is guaranteed with the part in a phase–locked condition, and all outputs loaded with 50
terminated to VCC/2.
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| MC88915FN55R2 | 功能描述:IC DRIVER CLK PLL 55MHZ 28-PLCC RoHS:否 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時(shí)鐘 輸出:時(shí)鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無(wú)/無(wú) 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應(yīng)商設(shè)備封裝:* 包裝:* |
| MC88915FN70 | 功能描述:IC DRIVER CLK PLL 70MHZ 28-PLCC RoHS:否 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時(shí)鐘 輸出:時(shí)鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無(wú)/無(wú) 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應(yīng)商設(shè)備封裝:* 包裝:* |
| MC88915FN70PLCC | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:Low Skew CMOS PLL Clock Driver |
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| MC88915T | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:LOW SKEW CMOS PLL CLOCK DRIVER |
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