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參數資料
| 型號： | TSB12LV01BPZ |
| 英文描述： | FPGA (Field-Programmable Gate Array) |
| 中文描述： | 總線控制器 |
| 文件頁數： | 10/106頁 |
| 文件大小： | 605K |
| 代理商： | TSB12LV01BPZ |
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2
1.2
TSB12LV32-EP Features
Controlled Baseline
One Assembly/Test Site, One Fabrication Site
Extended Temperature Performance of
–
40
°
C to 110
°
C
Enhanced Diminishing Manufacturing Sources (DMS) Support
Enhanced Product Change Notification
Qualification Pedigree
Compliant With IEEE 1394-1995 Standards and P1394a Supplement for High Performance
Serial Bus
Supports Transfer Rates of 400, 200, or 100 Mbit/s
Compatible With Texas Instruments Physical Layer Controllers (Phys)
Supports the Texas Instruments Bus Holder Galvanic Isolation Barrier
Glueless Interface to 68000 and ColdFire Microcontrollers/Microprocessors
Supports ColdFire Burst Transfers
2K-Byte General Receive FIFO (GRF) Accessed Through Microcontroller Interface Supports
Asynchronous and Isochronous Receive
2K-Byte Asynchronous Transmit FIFO (ATF) Accessed Through Microcontroller Interface
Supports Asynchronous Transmissions
Programmable Microcontroller Interface With 8-Bit or 16-Bit Data Bus, Multiple Modes of
Operation Including Burst Mode, and Clock Frequency to 60 MHz.
8-Bit or 16-Bit Data Mover Port (DM Port) Supports Isochronous, Asynchronous, and Streaming
Transmit/Receive From an Unbuffered Port at a Clock Frequency of 25 MHz.
Backward Compatible With All TSB12LV31(GPLynx) Microcontroller and Data Mover
Functionality in Hardware.
Four-Channel Support for Isochronous Transmit From Unbufferred 8/16 Bit Data Mover Port.
Single 3.3-V Supply Operation With 5-V Tolerance Using 5-V Bias Terminals.
High Performance 100-Pin PZ Package
Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an
extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85,
temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such
qualification testing should not be viewed as justifying use of this component beyond specified performance and
environmental limits.
Implements technology covered by one or more patents of Apple Computer, Incorporated and SGS Thomson, Limited.
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PDF描述 |
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| TSB12LV26-EP | 672-pin FineLine BGA |
| TSB12LV22PZP | OHCI-Lynx PCI-BASED IEEE 1394 HOST CONTROLLER |
| TSB12LV26PZ | OHCI-Lynx PCI-BASED IEEE 1394 HOST CONTROLLER |
| TSB14AA1 | FPGA (Field-Programmable Gate Array) |
| TSB14AA1I | FPGA (Field-Programmable Gate Array) |
相關代理商/技術參數 |
參數描述 |
|---|---|
| TSB12LV01BPZT | 功能描述:1394 接口集成電路 High Perf 1394 3.3V Link Layer RoHS:否 制造商:Texas Instruments 類型:Link Layer Controller 工作電源電壓: 封裝 / 箱體:LQFP 封裝:Tray |
| TSB12LV01BPZTG4 | 功能描述:1394 接口集成電路 High Perf 1394 3.3V Link Layer RoHS:否 制造商:Texas Instruments 類型:Link Layer Controller 工作電源電壓: 封裝 / 箱體:LQFP 封裝:Tray |
| TSB12LV01PZ | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| TSB12LV21 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:IEEE 1394 LINK LAYER CONTROLLER |
| TSB12LV21A | 制造商:TI 制造商全稱:Texas Instruments 功能描述:IEEE 1394-1995 BUS TO PCI BUS INTERFACE |
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