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參數資料
| 型號： | TSB12LV26-EP |
| 英文描述： | 672-pin FineLine BGA |
| 中文描述： | 軍事增強塑料的OHCI -山貓基于PCI的1394主控制器 |
| 文件頁數： | 15/106頁 |
| 文件大小： | 605K |
| 代理商： | TSB12LV26-EP |
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1
–
7
Table 1
–
1. Terminal Functions (Continued)
TERMINAL
NAME
I/O
DESCRIPTION
NO.
Miscellaneous Functions
CONTNDR
65
I/O
Contender. When asserted high, this terminal tells the link that this node is a
contender for isochronous resource manager (IRM) or bus manager functions.
The state of the CONTNDR must match the state of the Phy contender terminal for
1394-1995 compliant Phys, and the Phy register bit for 1394.A compliant Phys.
This terminal defaults to being an input on power up. After power up, the value of
this terminal may be driven internally by the CTNDRSTAT bit (bit#12 at 08h)
CYCLEIN
76
I
Cycle in. This input is an optional external 8-kHz clock used as the isochronous
cycle clock. It should only be used if attached to the cycle-master node. It is
enabled by the cycle source bit and should be tied high when not used.
CYSTART
2
O
Isochronous cycle start indicator. CYSTART signals the beginning an isochronous
cycle by pulsing for one DMCLK period.
DIRECT
79
I
Isolation terminal. When this terminal is asserted high, no isolation is present
between the TSB12LV32 and the Phy. When low, bus holder isolation becomes
active.
GND
5, 25, 30,
45, 57, 73,
78, 90,
100
Ground reference
INT
1
O
Interrupt. NOR of all internal interrupts.
9
I
STAT0
–
STAT2
54
–
56
O
General status outputs. STATn is the output signal selected with the CFR at
address 20h.
TESTMODE
16
I
This terminal is used to place the TSB12LV32 in the test mode. In normal
operation, this terminal must be tied to ground.
VDD5V
10, 35, 85
5 V (
±
0.5V) supply voltage for 5-V tolerant inputs. Only the Phy/link interface side
of the TSB12LV32 is
not
5-V tolerant. Tie this terminal to the 3.3-V supply voltage if
the TSB12LV32 is not connected to any devices driving 5-V signals. Tie this
terminal to the 5-V supply voltage if the TSB12LV32 is connected to any devices
driving 5-V signals. This terminal is only used to make inputs 5-V tolerant, it is not
used for any outputs.
VDD
15, 20, 40,
47, 68, 71,
80, 95
3.3 V (
±
0.3 V) supply voltage
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相關代理商/技術參數 |
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| TSB12LV26IPZT | 功能描述:1394 接口集成電路 OHCI-Lynx PCI-Based Host Controller RoHS:否 制造商:Texas Instruments 類型:Link Layer Controller 工作電源電壓: 封裝 / 箱體:LQFP 封裝:Tray |
| TSB12LV26IPZTEP | 制造商:Texas Instruments 功能描述:1394 I-TEMP OHCI-LYNX PCI-BASED IEEE 1394 HOST CONTROLLER - Rail/Tube |
| TSB12LV26PZ | 制造商:TI 制造商全稱:Texas Instruments 功能描述:OHCI-Lynx PCI-BASED IEEE 1394 HOST CONTROLLER |
| TSB12LV26PZT | 功能描述:1394 接口集成電路 OHCI-Lynx PCI-Based Host Controller RoHS:否 制造商:Texas Instruments 類型:Link Layer Controller 工作電源電壓: 封裝 / 箱體:LQFP 封裝:Tray |
| TSB12LV26PZTG4 | 功能描述:1394 接口集成電路 OHCI-Lynx PCI-Based IEEE1394 Host Cntrlr RoHS:否 制造商:Texas Instruments 類型:Link Layer Controller 工作電源電壓: 封裝 / 箱體:LQFP 封裝:Tray |
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