
The Western Design Center, Inc.
W65C02S Data Sheet
The Western Design Center, Inc. W65C02S Data Sheet
4
6.1
6.2
DC
C
HARACTERISTICS
TA
=
-40
°
C
TO
+85
°
C
(PLCC,
QFP)
TA=
0
°
C
TO
70
°
C
(DIP)
..........................................24
AC
C
HARACTERISTICS
TA
=
-40
°
C
TO
+85
°
C
(PLCC,
QFP)
TA=
0
°
C
TO
70
°
C
(DIP)
..........................................25
CAVEATS ............................................................................................................................................................................................36
7
8
W65C02DB DEVELOPER BOARD AND.................................................................................................................................37
IN-CIRCUIT EMULATOR (ICE)..........................................................................................................................................................37
8.1
F
EATURES
:
....................................................................................................................................................................................38
8.2
M
EMORY MAP
:
.............................................................................................................................................................................38
8.3
C
ROSS
-D
EBUGGING
M
ONITOR
P
ROGRAM
.............................................................................................................................38
8.4
BUILDING
...................................................................................................................................................................................38
9
HARD CORE MODEL.....................................................................................................................................................................39
9.1
F
EATURES OF THE
W65C02S
H
ARD
C
ORE
M
ODEL
.................................................................................................................39
10
SOFT CORE RTL MODEL........................................................................................................................................................39
10.1
W65C02
S
YNTHESIZABLE
RTL-C
ODE IN
V
ERILOG
HDL
.................................................................................................39
TABLE OF TABLES
TABLE 3-1 VECTOR LOCATIONS....................................................................................................................................................12
TABLE 3-2 PIN FUNCTION TABLE..................................................................................................................................................12
TABLE 4-1 ADDRESSING MODE TABLE......................................................................................................................................20
TABLE 5-1 INSTRUCTION SET TABLE.........................................................................................................................................21
TABLE 5-2 W65C02S OPCODE MATRIX........................................................................................................................................22
TABLE 6-1 ABSOLUTE MAXIMUM RATINGS............................................................................................................................23
TABLE 6-2 DC CHARACTERISTICS................................................................................................................................................24
TABLE 6-3 AC CHARACTERISTICS ..............................................................................................................................................25
TABLE 6-4 OPERATION, OPERATION CODES AND STATUS REGISTER.....................................................................28
TABLE 6-5 INSTRUCTION TIMING CHART...............................................................................................................................32
TABLE 7-1 MICROPROCESSOR OPERATIONAL ENHANCEMENTS ..............................................................................36
TABLE OF FIGURES
FIGURE 2-1 W65C02S INTERNAL ARCHITECTURE SIMPLIFIED BLOCK DIAGRAM.............................................7
FIGURE 2-2 W65C02S MICROPROCESSOR PROGRAMMING MODEL ............................................................................8
FIGURE 3-1 W65C02S 40 PIN PDIP PINOUT.................................................................................................................................13
FIGURE 3-2 W65C02S 44 PIN PLCC PINOUT ...............................................................................................................................14
FIGURE 3-3 W65C02S 44 PIN QFP PINOUT ..................................................................................................................................15
FIGURE 6-1 IDD VS VDD.....................................................................................................................................................................24
FIGURE 6-2 F MAX VS VDD...............................................................................................................................................................24
FIGURE 6-3 GENERAL TIMING DIAGRAM................................................................................................................................26