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參數(shù)資料
| 型號(hào)： | W9321 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 編解碼器 |
| 英文描述： | ADPCM Codec(ADPCM編解碼器) |
| 中文描述： | MU-LAW, ADPCM CODEC, PDIP28 |
| 封裝： | PLASTIC, DIP-28 |
| 文件頁(yè)數(shù)： | 12/35頁(yè) |
| 文件大?。?/td> | 457K |
| 代理商： | W9321 |
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Preliminary W9321
- 12 -
D3
D2
BCLKT
(BCLKR)
FST
(FSR)
1
2
3
4
5
6
7
8
DT
DR
Don't Care
Don't Care
D1
D0
D3
D2
D1
D0
MSB
LSB
MSB
LSB
Figure 7-3 Long Frame Sync for 32 Kbps ADPCM Timing
D7
D7
D6
BCLKT
(BCLKR)
FST
(FSR)
1
2
3
4
5
6
7
8
DT
DR
Don't Care
Don't Care
D5
D4
D3
D2
D1
D0
D6
D5
D4
D3
D2
D1
D0
MSB
LSB
MSB
LSB
Figure 7-4 Long Frame Sync for 64 Kbps ADPCM Timing
BCLKT
(BCLKR)
FST
(FSR)
1
2
3
4
5
6
7
DT
DR
Don't Care
Don't Care
D3
D2
D1
D0
D3
D2
D1
D0
8
MSB
LSB
MSB
LSB
Figure 7-5 Short Frame Sync for 32 Kbps ADPCM Timing
7.4. Serial Setup Port (SSP)
The W9321 has sixteen 8-bit wide setup and status registers, BR0--BR15, for controlling and
monitoring functions via the serial setup port (SSP). The SSP may be used by an external
microcontroller such as the Winbond W921E880F. The SSP has a full-duplex four wire interface
(marked as SSP Tx, SSP Rx, SSP CLK, and SSP EN) for communicating with an external micro-
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