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參數資料
| 型號： | W946432AD |
| 廠商： | WINBOND ELECTRONICS CORP |
| 英文描述： | 512K X 4 BANKS X 32 BITS DDR SDRAM |
| 中文描述： | 為512k × 4銀行× 32位DDR內存 |
| 文件頁數： | 6/40頁 |
| 文件大?。?/td> | 462K |
| 代理商： | W946432AD |
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W946432AD
AC OPERATING CONDITIONS
(0°C
≤
T
A
≤
70°C; V
DD
Q = +2.5V ± 0.2V, V
DD
= +2.5V ± 0.2V)
PARAMETER/ CONDITION
SYMBOL
MIN
V
REF
+
0.35
MAX
UNITS
NOTES
Input High (Logic 1) Voltage, DQ, DQS and DM signals
V
IH
(
AC
)
V
Input Low (Logic 0) Voltage, DQ, DQS and DM signals
V
IL
(
AC
)
V
REF
-
0.35
V
Input Differential Voltage, CK and CK inputs
V
ID
(
AC
)
0.7
V
DD
Q + 0.6
V
5
Input Crossing Point Voltage, CK and CK inputs
V
IX
(
AC
)
0.5*V
DD
Q-0.2
0.5*V
DD
Q+0.2
V
7
I
DD
SPECIFICATIONS AND CONDITIONS
(0°C
≤
T
A
≤
70°C; V
DD
Q = +2.5V ± 0.2V, V
DD
= +2.5V ± 0.2V)
MAX
OPERATING CURRENT: One Bank; Active-Precharge;
tRC = tRC MI
N;
tCK = tCK MIN; DQ, DM and DQS inputs changing twice per
clock cyle; address and control inputs changing once per clock cycle
OPERATING CURRENT: One Bank; Active-Read-Precharge;
Burst = 2; tRC = tRC MI
N;
CL = 3 ; tCK = tCK MIN; I
OUT
= 0 mA;
Address and control inputs changing once per clock cycle
PRECHARGE POWER-DOWN STANDBY CURRENT: All banks idle;
power-down mode; CKE
≤
V
IL
(MAX); tCK = tCK MIN
IDLE STANDBY CURRENT: CS
≥
V
IH
(MIN); All banks idle;
CKE
≥
V
IH
(MIN); tCK = tCK MIN; Address and other control inputs
changing once per clock cycle
ACTIVE POWER-DOWN STANDBY CURRENT: One bank active;
power-down mode; CKE
≤
V
IL
(MAX); tCK = tCK MIN
ACTIVE STANDBY CURRENT: CS
≥
V
IH
(MIN); CKE
≥
V
IH
(MIN);
One bank; Active-Precharge; tRC = tRAS MA
X;
tCK = tCK MIN; DQ,
DM and DQS inputs changing twice per clock cycle; address and
other control inputs changing once per clock cycle
OPERATING CURRENT: Burst = 2; Reads; Continuous burst;
One bank active; Address and control inputs changing once per clock
cycle; CL = 3 ; tCK = tCK MIN; I
OUT
= 0 mA
OPERATING CURRENT: Burst = 2; Writes; Continuous burst;
One bank active; Address and control inputs changing once per clock
cycle; CL = 3 ; tCK = tCK MIN; DQ, DM and DQS inputs changing
twice per clock cycle
SYMBOL
UNITS
NOTES
I
DD
0
TBD
mA
I
DD
1
TBD
mA
I
DD
2P
TBD
mA
I
DD
2N
TBD
mA
I
DD
3P
TBD
mA
I
DD
3N
TBD
mA
I
DD
4R
TBD
mA
I
DD4W
TBD
mA
AUTO REFRESH CURRENT: tRC = tRFC (MI
N)
I
DD
5
TBD
mA
SELF REFRESH CURRENT: CKE
≤
0.2V
I
DD
6
TBD
mA
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|---|---|
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| W963A6BBN70 | 512K WORD X 16 BIT LOW POWER PSEUDO SRAM |
| W963A6BBN70E | 512K WORD X 16 BIT LOW POWER PSEUDO SRAM |
| W963A6BBN70I | 512K WORD X 16 BIT LOW POWER PSEUDO SRAM |
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相關代理商/技術參數 |
參數描述 |
|---|---|
| W9464G6IB | 制造商:WINBOND 制造商全稱:Winbond 功能描述:1M × 4 BANKS × 16 BITS DDR SDRAM |
| W9464G6IH | 制造商:WINBOND 制造商全稱:Winbond 功能描述:1M ?? 4 BANKS ?? 16 BITS DDR SDRAM |
| W9464G6JH | 制造商:WINBOND 制造商全稱:Winbond 功能描述:1M ? 4 BANKS ? 16 BITS DDR SDRAM |
| W9464G6JH-4 | 制造商:Winbond Electronics Corp 功能描述:IC DDR SDRAM 64M 200MHZ 66TSOP |
| W9464G6JH-5 | 制造商:Winbond Electronics Corp 功能描述:64MBIT DDRI 制造商:Winbond Electronics Corp 功能描述:IC DDR SDRAM 64M 200MHZ 66TSOP |
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