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參數資料

Altera Corporation

MAX 7000 Programmable Logic Device Family Data Sheet

Programmable Interconnect Array

Logic is routed between LABs via the programmable interconnect array

(PIA). This global bus is a programmable path that connects any signal

source to any destination on the device. All MAX 7000 dedicated inputs,

I/O pins, and macrocell outputs feed the PIA, which makes the signals

available throughout the entire device. Only the signals required by each

LAB are actually routed from the PIA into the LAB. Figure 7 shows how

the PIA signals are routed into the LAB. An EEPROM cell controls one

input to a 2-input AND gate, which selects a PIA signal to drive into the

LAB.

Figure 7. PIA Routing

While the routing delays of channel-based routing schemes in masked or

FPGAs are cumulative, variable, and path-dependent, the MAX 7000 PIA

has a fixed delay. The PIA thus eliminates skew between signals and

makes timing performance easy to predict.

I/O Control Blocks

The I/O control block allows each I/O pin to be individually configured

for input, output, or bidirectional operation. All I/O pins have a tri-state

buffer that is individually controlled by one of the global output enable

signals or directly connected to ground or VCC. Figure 8 shows the I/O

control block for the MAX 7000 family. The I/O control block of EPM7032,

EPM7064, and EPM7096 devices has two global output enable signals that

are driven by two dedicated active-low output enable pins (OE1 and OE2).

The I/O control block of MAX 7000E and MAX 7000S devices has six

global output enable signals that are driven by the true or complement of

two output enable signals, a subset of the I/O pins, or a subset of the I/O

macrocells.

To LAB

PIA Signals

相關代理商/技術參數	參數描述
EPM7128SLC84-7	功能描述:CPLD - 復雜可編程邏輯器件 CPLD - MAX 7000 128 Macro 68 IOs RoHS:否制造商:Lattice 系列: 存儲類型:EEPROM 大電池數量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
EPM7128SLC84-7N	功能描述:CPLD - 復雜可編程邏輯器件 CPLD - MAX 7000 128 Macro 68 IOs RoHS:否制造商:Lattice 系列: 存儲類型:EEPROM 大電池數量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
EPM7128SLI84-10	功能描述:CPLD - 復雜可編程邏輯器件 CPLD - MAX 7000 128 Macro 68 IOs RoHS:否制造商:Lattice 系列: 存儲類型:EEPROM 大電池數量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
EPM7128SLI84-10N	功能描述:CPLD - 復雜可編程邏輯器件 CPLD - MAX 7000 128 Macro 68 IOs RoHS:否制造商:Lattice 系列: 存儲類型:EEPROM 大電池數量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
EPM7128SQC10010	制造商:ALTERA 功能描述:*

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