
W89C840AF
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15
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Publication Release Date:October 2000
Revision 1.01
status register
structure constructing register
data buffer 1 pointer
data buffer 2 pointer
first descritpor of Rx descriptor list
data buffer 1
data buffer 2
status register
structure constructing register
data buffer 1 pointer
data buffer 2 pointer
second descritpor of Rx descriptor list
data buffer 1
data buffer 2
status register
structure constructing register
data buffer 1 pointer
data buffer 2 pointer
third descritpor of Rx descriptor list
data buffer 1
data buffer 2
status register
structure constructing register
data buffer 1 pointer
data buffer 2 pointer
last descritpor of Rx descriptor list
data buffer 1
data buffer 2
for storing the first RX packet data
for storing the first RX packet data
for storing the 2nd RX packet data
for storing the 2nd RX packet data
for storing the 3rd RX packet data
for storing the 3rd RX packet data
for storing the nth RX packet data
for storing the nth RX packet data
The software driver can request more than one descriptors and data buffers at a time. As described in the
above diagram, the total descriptors are constructed as a ring. A packet can be stored in more than one data
buffers. In that case, the data buffer 1 is stored first and then data buffer 2. If a packet contains more data than the
two data buffer can accommodate, it fetches the next descriptor and two new data buffers to save the extra more
data. That is a packet can be stored in more than one descriptors. In the contrary, a descriptor is not allowed to
hold more than one packet. If the data buffer 1 can completely store the received packet, the data buffer 2 will be
left empty and the next packet will be firstly stored at the data buffer 1 in the next descriptor. The diagram shown
above is just one case of the buffer application. When the last descriptor is used by a received packet,
the next
descriptor should be the first descriptor of the ring. Once the descriptors are processed by the driver, it can be
released to the ring for later use.
In the ring structure, the start address of the next descriptor is specified by the
skip length, bit2 to bit6 of C00/CBCR register, and the start address of the first descriptor is specified by the
C0C/CRDLA register.
For the descriptors with the chain structure, host is allowed to allocate scatterly a block of memory with the
size of 4 long words, linked by the pointer which located at the
only one link to a data buffer to store the received packet data. The descriptors are located randomly and linked by
the second pointer in each descriptor, which points to the start address of the next descriptor.
ext descriptor pointer
_
field. Each descriptor has
The following figures describe the chain structures of receive descriptor.