
W89C880F FastMPR
Publication Release Date: January 1997
- 15 -
Revision A1
The FastMPR implements a total of 3 MII registers for users. Each function is described as follows:
NORMAL COMMAND REGISTERS
R/W
Port_Disable
R/W
TP0
10 and extension port are enabled when these bits
are reset. TP0
10 and extension port are disabled when
these bits are set.
SRAM_Select0 R/W
64K byte SRAM size is selected when this bit is reset.
128K byte SRAM size is selected when this bit is set.
SRAM_Select1 R/W
32 KB
×
8
×
2 or 64 KB
×
8
×
2 SRAM interfaceis
selected when this bit is reset. 64 KB
×
8
×
1 or 128 KB
×
8
×
1 SRAM interface is selected when this bit is set.
Bridge_Disable
R/W
Extension port function is enabled when this bit is reset
Extension port function is disabled when this bit is set.
Reserved.
Partition_status
R
Bit 0
11 show the partition status of TP0
10 ports and
extension port. TP0
10 and extension port are connected
when these bits are reset. TP0
10 and extension port are
partitioned when these bits are set.
Reserved.
Jabber_status
R
Bit 0
11 show the jabber status of TP0
10 ports and
extension port. TP0
10 and extension port are in jabber
when these bits are set.
Reserved.
REGISTER
0
BIT
0
11
NAME
DESCRIPTION
0
12
0
13
0
14
0
1
15
0
11
1
2
12
15
0
11
2
12
15
Notes:
1. The bit 11 of registers 1, 2 reports the partition, jabber. These status functions are reported only when the
extension port
is disabled.
2. "R" means read only, "W" means write only, "R/W" means read/write.
Port Status Direct Report
The port status direct report is the easiest way to obtain information on the network status. The
FastMPR XCOLRPT output pin provides a collision status report. Four pins (M0
3) are used to select
the type of status report and latching. Twelve pins, TP0
10RPT and BTPRPT, report the port status.
Each pin can sequentially report four aspects of the port status: link/activity, partition, utilization, and
jabber. The XCOLRPT report is asserted whenever a collision occurs in the FastMPR. Pins M0
3
determine the aspect of the network status reported on the twelve port status pins. The FastMPR
reports the network status to a set of LEDs, which are driven through an external driver IC.
The timing chart for the status display pins M0
3 versus the port status data train is shown in the
figure below.