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參數(shù)資料
| 型號： | W89C880F |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 通信及網(wǎng)絡 |
| 英文描述： | 100Base-Tx/T4 Multiport Repeater Controller(100Base-Tx/T4多端口中繼器控制器) |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PQFP160 |
| 封裝： | PLASTIC, QFP-160 |
| 文件頁數(shù)： | 4/26頁 |
| 文件大?。?/td> | 313K |
| 代理商： | W89C880F |
W89C880F FastMPR
- 4 -
Pin Description, continued
MANAGEMENT INTERFACE PINS
NAME
NO.
I/O
DESCRIPTION
MDC
157
I
Management Clock. Input for FastMPR register read/write
configuration. Maximum clock rate is 2.5 MHz. This pin is used to
synchronize with MDIO.
MDIO
158
I/O/L
Management Data. When the address of the MDIO device
matches the reset jumper setting of TP0
4RPT/AD<0:4> on the
FastMPR, the FastMPR will respond to the MDIO read/write
command.
PORT STATUS REPORT/JUMPER SETTING PINS
TP0
4RPT/
AD<0:4>
137
140, 142
I/O/L
TP0-4 Port Status Output/FastMPR Device Address. After power-
on reset, each of these pins can output the status train of one port,
which sequentially reports four aspects of the FastMPR port
status. The status train of each TPnRPT contains link/activity,
partition, utilization, and jabber in sequence. The status train is
latched by the signals M0
3. M0 is used to latch the link/activity
status of all ports. M1 is used to latch the partition status of all
ports. M2 is used to latch the network utilization at some instant in
time. M3 is used to latch the jabber status. When these pins
output the port status, they are active low. During power-on reset,
these pins are used as the device address input pins of the
FastMPR. If these pins are each connected with a pull-up resistor
to the power supply, the input value of each pin is "1". If no pull-up
resistor is connected to the pin, the input value is "0". When the
MDIO command address matches the device address, the
FastMPR will respond to MDIO read/write commands.
TP5RPT/
DISBG
143
I/O/L
TP5 Port Status Output /Extension port Enable. After power-on
reset, this pin can sequentially output four aspects of TP5 port
status: link/activity, partition, network utilization, and jabber. This
pin outputs the port status, it is active low. During power-on reset,
if no pull-up resistor is connected to this pin, the extension port is
enabled. If a pull-up resistor is connected to this pin, the extension
port is disabled. In this situation, the extension port acts as a
normal MII interface and the FastMPR can support up to twelve
ports.
TP6RPT/
SRAMSEL0
144
I/O/L
TP6 Port Status Output/SRAM size select. After power-on reset,
this pin can sequentially output four aspects of TP6 port status:
link/activity, partition, network utilization, and jabber. When the
pin outputs the port status, it is active low. During power-on reset,
if no pull-up resistor is connected to this pin, 64 KB data buffer is
selected. If a pull-up resistor is connected to this pin, the buffer
size is 128 KB.
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