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參數(shù)資料
| 型號(hào)： | W89C940 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 英文描述： | ELANC-PCI (TWISTED-PAIR ETHER-LAN CONTROLLER WITH PCI INTERFACE) |
| 中文描述： | ELANC -的PCI（雙絞線醚局域網(wǎng)控制器帶有PCI接口） |
| 文件頁(yè)數(shù)： | 10/61頁(yè) |
| 文件大?。?/td> | 353K |
| 代理商： | W89C940 |
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W89C940
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Normally, the data in the FIFO cannot be read; reading FIFO data during normal operation may cause the
system to hang. In loopback mode, however, the SLCT allows FIFO data to be read by byte in order to check
the correctness of the loopback operation.
Receive Logic
The receive logic is responsible for receiving the serial network data and packing the data in byte/word
sequence. The receive logic thus has serial to parallel logic in addition to network detection capability.
The ELANC-PCI accepts both physical addresses and group addresses (multicast and broadcast addresses).
The SLCT extracts the address field from the serial input data. It then determines if the address is acceptable,
according to the configurations defined in the receive configuration register (RCR). If the address is not
acceptable, the packet reception is aborted. If the address is acceptable, the data packet is sent to the serial to
parallel logic before being fed into the FIFO. Data packets can thus be processed either byte or word-wide.
After receiving a data packet, the SLCT automatically adds four bytes of data receive status, next packet
pointer, and two bytes of receive byte count into the FIFO for network management purposes. The receive
status contains the status of the incoming packet, so that the system can determine if the packet is desired. The
next packet pointer points to the starting address of the next packet in the local receive ring. The receive byte
count is the length of the packet received by the SLCT. Note that the receive byte count may be different from
the "length" field specified in the Ethernet packet format. These four bytes of data will be transferred to the local
buffer with the last batch of the local DMA. However, these four bytes are stored at the first four addresses
before the packet.
Transmit Logic
The SLCT must be filled before transmission begins. That is, the local DMA read must begin before the SLCT
begins transmission. The SLCT first transmits 62 bits of preamble, then two bits of SFD, and then the data
packet. The parallel to serial logic serializes the data from the FIFO into a data packet. After the data packet,
the SLCT optionally adds four bytes of cyclic redundancy code (CRC) to the tail of the packet.
A protocol PLA determines the network operations of the ELANC-PCI. Collision detection, random backoff, and
auto retransmit are implemented in the transmit logic. The protocol PLA ensures that the ELANC-PCI follows
IEEE 802.3 protocol.
10BASE2 AND 10BASE5 PLS (PHYSICAL LAYER SIGNAL) FUNCTION
SNA Operation
TP
or
Coax
AUI
Interface
PLL
Manchester
Encoder/Decoder
osc/
crytal
SLCT Interface
Logic
L
C
E
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