
Preliminary W79E217A Data Sheet
Publication Release Date: December 14, 2007
- 19 -
Revision A3.0
SYMBOL
DEFINITION
ADD
RESS
MSB
LSB
BIT_ADDRESS,
SYMBOL
RESET
INTCTRL
INTERRUPT
REGISTER
CONTROL
FFH
-
-
INT5CT1 INT5CT0 INT4CT1 INT4CT0 INT3CT1 INT3CT0 xx00 0000B
CCH1
/PLSCNTH
CAPTURE COUNTER HIGH 1
REGISTER
FEH
CCH1.7
/PLSCN
TH.7
CCH1.6
/PLSCN
TH.6
CCH1.5
/PLSCN
TH.5
CCH1.4
/PLSCN
TH.4
CCH1.3
/PLSCN
TH.3
CCH1.2
/PLSCN
TH.2
CCH1.1
/PLSCN
TH.1
CCH1.0
/PLSCN
TH.0
0000 0000B
CCL1
/PLSCNTL
CAPTURE COUNTER LOW 1
REGISTER
FDH
CCL1.7
/PLSCN
TL.7
CCL1.6
/PLSCN
TL.6
CCL1.5
/PLSCN
TL.5
CCL1.4
/PLSCN
TL.4
CCL1.3
/PLSCN
TL.3
CCL1.2
/PLSCN
TL.2
CCL1.1
/PLSCN
TL.1
CCL1.0
/PLSCN
TL.0
0000 0000B
CCH0
/PCNTH
CAPTURE COUNTER HIGH 0
REGISTER
FCH
CCH0.7
/PCNTH.
7
CCH0.6
/PCNTH.
6
CCH0.5
/PCNTH.
5
CCH0.4
/PCNTH.
4
CCH0.3
/PCNTH.
3
CCH0.2
/PCNTH.
2
CCH0.1
/PCNTH.
1
CCH0.0
/PCNTH.
0
0000 0000B
CCL0
/PCNTL
CAPTURE COUNTER LOW 0
REGISTER
FBH
CCL0.7
/PCNTL.
7
CCL0.6
/PCNTL.
6
CCL0.5
/PCNTL.
5
CCL0.4
/PCNTL.
4
CCL0.3
/PCNTL.
3
CCL0.2
/PCNTL.
2
CCL0.1
/PCNTL.
1
CCL0.0
/PCNTL.
0
0000 0000B
EIP1
EXTENDED
PRIORITY 1
INTERRUPT
FAH
-
-
PNVMI
PCPTF
PT3
PBKF
PPWMF PSPI
xx00 0000B
EIE1
INTERRUPT ENABLE 1
F9H
-
-
ENVM
ECPTF
ET3
EBK
EPWM
ESPI
xx00 0000B
EIP
EXTENDED
PRIORITY
INTERRUPT
F8H
(FF)
PS1
(FE)
PX5
(FD)
PX4
(FC)
PWDI
(FB)
PX3
(FA)
PX2
(F9)
-
(F8)
PI2C
0000 00x0B
EIPH
EXTENDED
HIGH PRIORITY
INTERRUPT
F7H
PS1H
PX5H
PX4H
PWDIH
PX3H
PX2H
-
PI2CH
0000 00x0B
I2CSADEN I2C SLAVE ADDRESS MASK F6H
I2CSAD
EN.7
I2CSAD
EN.6
I2CSAD
EN.5
I2CSAD
EN.4
I2CSAD
EN.3
I2CSAD
EN.2
I2CSAD
EN.1
I2CSAD
EN.0
1111 1110B
SPDR
SERIAL PERIPHERAL DATA
REGISTER
F5H
SPD.7
SPD.6
SPD.5
SPD.4
SPD.3
SPD.2
SPD.1
SPD.0
xxxx xxxxB
SPSR
SERIAL
STATUS REGISTER
PERIPHERAL
F4H
SPIF
WCOL
SPIOVF MODF
DRSS
-
-
-
0000 0xxxB
SPCR
SERIAL
CONTROL REGISTER
PERIPHERAL
F3H
SSOE
SPE
LSBFE
MSTR
CPOL
CPHA
SPR1
SPR0
0000 0100B
B
B REGISTER
F0H
(F7)
(F6)
(F5)
(F4)
(F3)
(F2)
(F1)
(F0)
0000 0000B
I2TIMER
I2C
REGISTER
TIMER
COUNTER
EFH
-
-
-
-
-
ENTI
DIV4
TIF
xxxx x000B
I2CLK
I2C CLOCK RATE
EEH I2CLK.7 I2CLK.6 I2CLK.5 I2CLK.4 I2CLK.3 I2CLK.2 I2CLK.1 I2CLK.0 0000 0000B
I2STATUS I2C STATUS REGISTER
EDH
I2STAT
US.7
I2STAT
US.6
I2STAT
US.5
I2STAT
US.4
I2STAT
US.3
-
-
-
1111 1000B
I2DAT
I2C DATA
ECH I2DAT.7 I2DAT.6 I2DAT.5 I2DAT.4 I2DAT.3 I2DAT.2 I2DAT.1 I2DAT.0 0000 0000B
NVMADDRHNVM HIGH BYTE ADDRESS EBH -
-
-
-
-
NVMAD
DRH.10
NVMAD
DRH.9
NVMAD
DRH.8
xxxx x000B
I2ADDR
I2C SLAVE ADDRESS
EAH ADDR.7 ADDR.6 ADDR.5 ADDR.4 ADDR.3 ADDR.2 ADDR.1 GC
0000 0000B
I2CON
I2C CONTROL REGISTER
E9H
-
ENS
STA
STO
SI
AA
I2CIN
-
X000 000xB
EIE
EXTENDED
ENABLE
INTERRUPT
E8H
(EF)
ES1
(EE)
EX5
(ED)
EX4
(EC)
EWDI
(EB)
EX3
(EA)
EX2
(E9)
(E8)
EI2C
0000 00x0B
PWMCON4
PWM CONTROL REGISTER 4
E7H
PWMEO
M
PWMOO
M
PWM6O
M
PWM7O
M
-
-
-
BKF
0000 xxx0B
PDTC0
DEAD
REGISTER 0
TIME
CONTROL
E6H
PDTC0.7 PDTC0.6 PDTC0.5 PDTC0.4 PDTC0.3 PDTC0.2 PDTC0.1 PDTC0.0 0000 0000B
PDTC1
DEAD
REGISTER 1
TIME
CONTROL
E5H
PDTC1.7 PDTC1.6 PDTC1.5 PDTC1.4 PDTC1.3 PDTC1.2 PDTC1.1 PDTC1.0 0000 0000B
LCDCN
LCD CONTROL REGISTER
E4H
LCDEN
Clear
Duty
Pump
-
FS2
FS1
FS0
0000 x000B
ADCL
ADC CONVERTER RESULT
LOW BYTE
E3H
ADCLK1 ADCLK0 -
-
-
-
ADC.1
ADC.0
00xx xxxxB