
W88111AF/W88112F
Preliminary/Confidential
ATAPI CD-ROM Decoder & Controller
This specification is subject to change without notice.
Publication Release Date: Aug, 1996
Preliminary/ Confidential Revision A0.1
- 54 -
TSC - Target Search Counter - (read 83h)
If TARFEN (80h.7) is enabled, this register is cleared to 00,00h whenever DECEN (0Ah.7) changes
from low to high. After the decoder is enabled, he number of sectors have been searched can be
monitored by reading TSC.
Target Header Register - (read/write 84h-86h)
Target-Header-Register (84h-86h) are used to hold the header information of target sector. If
TARGEN (80h.7) is enabled, the operation of target search is triggered by changing DECEN (0Ah.7)
from low to high. After target is found, the number in Target-Header-Register (84h-86h) will
automatically increase after decoding of its corresponding sector is finished. Once the headers of
following sector do not match the updated target, flag HCEI becomes high and activates DECIb
(01h.5) if HCEEN (80h.0) is enabled.
TMIN - Target Minute Register - (read/write 84h)
This register is used to hold the MINUTE information of target sector.
TSEC - Target Second Register - (read/write 85h)
This register is used to hold the SECOND information of target sector.
TFRAM - Target Frame Register - (read/write 86h)
This register is used to hold the FRAME information of target sector.
FEACTL - Feature Control Register - (write 88h)
Bit 7: ACEON - Acceleration On
Setting this bit high turns on the acceleration function of error correction/detection so that the system
performance is highly improved. This acceleration function is on by default for W88112F.
Bit 6: ACEOFF - Acceleration Off
Setting this bit low turns off the acceleration function of error correction/detection.